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LMP8481ATQDGKRQ1

Texas Instruments · Operational Amplifier · VSSOP-8

LMP8481ATQDGKRQ1 from Texas Instruments, in a VSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RSP input Positive current-sense input; RSP to GND is rated -0.3 V to 85 V (absolute maximum).
2 VCC power_in Positive supply voltage with a recommended range of 4.5 V to 76 V and an absolute maximum of 85 V (VCC to GND).
3 NC unconnected No connection, not internally connected on the LMP8481-Q1.
4 GND power_in Ground reference for the device.
5 VOUT output Buffered output; the absolute maximum is -0.3 V to the lesser of (VCC + 0.3) or +20 V, with output current limited to 20 mA.
6 REFB input Reference voltage B input (LMP8481-Q1 only); when both VREF pins are tied together the recommended range is -0.3 V to the lesser of (VCC - 1.5) or +6 V.
7 REFA input Reference voltage A input (LMP8481-Q1 only); when both VREF pins are tied together the recommended range is -0.3 V to the lesser of (VCC - 1.5) or +6 V.
8 RSN input Negative current-sense input; RSN to GND is rated -0.3 V to 85 V (absolute maximum).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VSSOP-8
Category Operational Amplifier/Comparator
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input offset voltage (RTI), 25°C VOS -265 80 265 µV VCC = VRSP = 48 V, ΔV = 100 mV, TA = 25°C 5
Input offset voltage (RTI), over temperature VOS -900 900 µV -40°C ≤ TA ≤ 125°C 5
Input bias current, per input, over temperature IB 12 µA VCC = VRSP = 76 V, per input, -40°C ≤ TA ≤ 125°C 5
Input leakage current, over temperature ILEAK 2 µA VCC = 0, VRSP = 86 V, both inputs together, -40°C ≤ TA ≤ 125°C 5
Differential input voltage across sense resistor, -T version VSENSE(MAX) 667 mV VCC = 16; -T version, -40°C ≤ TA ≤ 125°C 5
Gain, -T version, over temperature AV 19.8 20 20.2 V/V -T version, -40°C ≤ TA ≤ 125°C 5
Gain error, 25°C -0.6 0.6 % VCC = VRSP = 48 V, TA = 25°C 5
Gain error, over temperature -0.8 0.8 % VCC = VRSP = 48 V, -40°C ≤ TA ≤ 125°C 5
DC power-supply rejection ratio PSRR (DC) 122 dB VRSP = 48 V, VCC = 4.5 to 76 V 5
DC power-supply rejection ratio, over temperature PSRR (DC) 100 dB VRSP = 48 V, VCC = 4.5 to 76 V, -40°C ≤ TA ≤ 125°C 5
DC common-mode rejection ratio CMRR (DC) 124 dB VCC = 48 V, VRSP = 4.5 to 76 V 5
DC common-mode rejection ratio, over temperature CMRR (DC) 100 dB VCC = 48 V, VRSP = 4.5 to 76 V, -40°C ≤ TA ≤ 125°C 5
DC common-mode rejection ratio, 4 V input CMRR (DC) 124 dB VCC = 48 V, VRSP = 4 to 76 V 5
Input common-mode voltage range CMVR 4 76 V CMRR > 100 dB, -40°C ≤ TA ≤ 125°C 5
Maximum output voltage (headroom), VOMAX = VCC, VOUT VOMAX 230 500 mV VCC = 4.5 V, VRSP = 48 V, VSENSE = +1 V, IOUT (sourcing) 500 μA 5
Minimum output voltage VOMIN 3 mV VCC = VRSP = 48 V, VSENSE = -1 V, IOUT (sinking) = 10 µA 6
Minimum output voltage, over temperature VOMIN 15 mV VCC = VRSP = 48 V, VSENSE = -1 V, IOUT (sinking) = 10 µA, -40°C ≤ TA ≤ 125°C 6
Minimum output voltage, 4.5 V supply VOMIN 3 mV VCC = VRSP = 4.5 V, VSENSE = -1 V, IOUT (sinking) = 10 µA 6
Minimum output voltage, 100 µA sinking VOMIN 18 mV VCC = VRSP = 48 V, VSENSE = -1 V, IOUT (sinking) = 100 µA 6
Minimum output voltage, 100 µA sinking, over temperature VOMIN 55 mV VCC = VRSP = 48 V, VSENSE = -1 V, IOUT (sinking) = 100 µA, -40°C ≤ TA ≤ 125°C 6
Minimum output voltage, 4.5 V supply, 100 µA sinking VOMIN 18 mV VCC = VRSP = 4.5 V, VSENSE = -1 V, IOUT (sinking) = 100 µA 6
Supply current, 25°C ICC 88 100 µA VOUT = 2 V, RL = 10 MΩ, VCC = VRSP = 76 V 6
Supply current, over temperature ICC 155 µA VOUT = 2 V, RL = 10 MΩ, VCC = VRSP = 76 V, -40°C ≤ TA ≤ 125°C 6
Maximum output capacitance load CLOAD 500 pF No sustained oscillations 6
Absolute maximum supply voltage VCC to GND -0.3 85 V Supply voltage (VCC to GND) 4
Absolute maximum RSP or RSN to GND -0.3 85 V RSP or RSN to GND 4
Absolute maximum VOUT to GND -0.3 V VOUT to GND; max is the lesser of (VCC + 0.3) or +20 V 4
Absolute maximum VREF, other VREF pin tied to ground -0.3 12 V VREF pins (LMP8481-Q1 only), other VREF pin tied to ground 4
Absolute maximum VREF, both VREF pins tied together -0.3 6 V VREF pins (LMP8481-Q1 only), applied to both VREF pins tied together 4
Absolute maximum differential input voltage -85 85 V Differential input voltage 4
Absolute maximum current into output pin -20 20 mA Current into output pin 4
Absolute maximum current into any other pin -5 5 mA Current into any other pins 4
Absolute maximum operating temperature -40 125 °C Operating temperature 4
Absolute maximum junction temperature TJ -40 150 °C Junction temperature 4
Absolute maximum storage temperature -65 150 °C Storage temperature 4
Recommended supply voltage VCC 4.5 76 V Supply voltage (VCC) 4
Recommended common-mode voltage VCM 4 76 V Common mode voltage 4
Recommended reference input, VREFA and VREFB tied together VREF -0.3 V VREFA and VREFB tied together (LMP8481-Q1 only); max is the lesser of (VCC, 1.5) or +6 V 4
Recommended reference input, single VREF pin with other grounded VREF -0.3 V Single VREF pin with other VREF pin grounded (LMP8481-Q1 only); -0.3 or +12 where the average of the two VREF pins is less than the lesser of (VCC-1.5) or +6 4
Junction-to-ambient thermal resistance, DGK (VSSOP) 8-pin RθJA 185 °C/W DGK (VSSOP) 8 pins 4
Bandwidth (-3 dB) BW 270 kHz RL = 10 MΩ, CL = 20 pF 6
Slew rate SR 1 V/µs VSENSE from 10 mV to 80 mV, RL = 10 MΩ, CL = 20 pF 6
Input-referred voltage noise eni 95 nV/√Hz f = 1 kHz 6
Output settling time to 1% of final value tSETTLE 20 µs VSENSE = 10 mV to 100 mV and 100 mV to 10 mV 6
Power-up time to 1% of final value tPU 50 µs VCC = VRSP = 48 V, VSENSE = 100 mV 6
Saturation recovery time tRECOVERY 50 µs Output settles to 1% of final value, device does not experience phase reversal when overdriven 6
Output resistance, load regulation ROUT 0.1 Ω VSENSE = 100 mV 5
Output load regulation VOLREG 0.001 % VCC = 20, VRSP = 16 V, VOUT = 12, ΔIL = 200 nA to 8 mA 6

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper pin pad, and ideally on the same copper layer with minimal vias or connectors. These recommendations can be 22

CAD (KiCad official)

  • Symbol: LMP8481ATQDGKRQ1
  • Footprint: Package_SO:VSSOP-8_3x3mm_P0.65mm
  • 3D model: VSSOP-8 (KiCad packages3D, STEP)
  • 3D model files: lmp8481atqdgkrq1-etched.step / lmp8481atqdgkrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lmp8481atqdgkrq1.step / lmp8481atqdgkrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (31 pp, sha256 a39a3c3af0dae3b1, retrieved 2026-11-06, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF