component
LMP8480MME-T
Public Made by Adomby adom
Texas Instruments Current-Sensing Amplifiers, VSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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LMP8480MME-T
Texas Instruments · Current-Sensing Amplifiers · VSSOP-8
LMP8480MME-T from Texas Instruments, in a VSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RSP | input | Positive current sense input, with common-mode voltage range of 4.0 V to 76 V (absolute maximum 85 V to GND). |
| 2 | VCC | power_in | Positive supply voltage, recommended 4.5 V to 76 V (absolute maximum 85 V). |
| 3 | NC | unconnected | No connection; not internally connected. |
| 4 | GND | power_in | Ground. |
| 5 | VOUT | output | Amplifier output, buffered with more than 5 mA drive, limited to the lesser of VCC + 0.3 V or 20 V (absolute maximum). |
| 6 | NC | unconnected | On the LMP8480 this pin is a no connection (it is the reference input only on the LMP8481). |
| 7 | NC | unconnected | On the LMP8480 this pin is a no connection (it is the reference input only on the LMP8481). |
| 8 | RSN | input | Negative current sense input, with common-mode voltage range of 4.0 V to 76 V (absolute maximum 85 V to GND). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VSSOP-8 |
| Category | Amplifiers |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Offset Voltage (RTI) | VOS | -265 | 80 | 265 | µV | VCC = VRSP = 48 V, TA = 25°C, ΔV = 100 mV | 5 |
| Input Offset Voltage (RTI), over temperature | VOS | -900 | 900 | µV | VCC = VRSP = 48 V, -40°C ≤ TA ≤ 125°C | 5 | |
| Input Bias Current, over temperature | IB | 6.3 | 12 | µA | VCC = VRSP = 76 V, Per Input; max at -40°C ≤ TA ≤ 125°C | 5 | |
| Input Leakage Current | ILEAK | 0.01 | 2 | µA | VCC = 0, VRSP = 86 V, Both inputs together; max at -40°C ≤ TA ≤ 125°C | 5 | |
| Gain (-T version), over temperature | AV | 19.8 | 20 | 20.2 | V/V | -T Version, -40°C ≤ TA ≤ 125°C | 5 |
| Gain Error | -0.6 | 0.6 | % | VCC = VRSP = 48 V, TA = 25°C | 5 | ||
| Gain Error, over temperature | -0.8 | 0.8 | % | VCC = VRSP = 48 V, -40°C ≤ TA ≤ 125°C | 5 | ||
| Differential Input Voltage Across Sense Resistor (-T) | VSENSE(MAX) | 667 | mV | -T Version, -40°C ≤ TA ≤ 125°C | 5 | ||
| DC Power Supply Rejection Ratio | PSRR | 122 | dB | VRSP = 48 V, VCC = 4.5 to 76 V | 5 | ||
| DC PSRR, over temperature | PSRR | 100 | dB | VRSP = 48 V, VCC = 4.5 to 76 V, -40°C ≤ TA ≤ 125°C | 5 | ||
| DC Common Mode Rejection Ratio | CMRR | 124 | dB | VCC = 48 V, VRSP = 4.5 to 76 V | 5 | ||
| DC CMRR, over temperature | CMRR | 100 | dB | VCC = 48 V, VRSP = 4.5 to 76 V, -40°C ≤ TA ≤ 125°C | 5 | ||
| Input Common Mode Voltage Range | CMVR | 4 | 76 | V | CMRR > 100 dB, -40°C ≤ TA ≤ 125°C | 5 | |
| Maximum Output Voltage (Headroom) | VOMAX | 230 | 500 | mV | VCC = 4.5 V, VRSP = 48 V, VSENSE = +1 V, IOUT (sourcing) 500 µA | 5 | |
| Minimum Output Voltage, 10 µA sink, 48 V, over temperature | VOMIN | 3 | 15 | mV | VCC = VRSP = 48 V, VSENSE = -1 V, IOUT (sinking) = 10 µA; max at -40°C ≤ TA ≤ 125°C | 6 | |
| Minimum Output Voltage, 10 µA sink, 4.5 V | VOMIN | 3 | mV | VCC = VRSP = 4.5 V, VSENSE = -1 V, IOUT (sinking) = 10 µA | 6 | ||
| Minimum Output Voltage, 100 µA sink, 48 V, over temperature | VOMIN | 18 | 55 | mV | VCC = VRSP = 48 V, VSENSE = -1 V, IOUT (sinking) = 100 µA; max at -40°C ≤ TA ≤ 125°C | 6 | |
| Minimum Output Voltage, 100 µA sink, 4.5 V | VOMIN | 18 | mV | VCC = VRSP = 4.5 V, VSENSE = -1 V, IOUT (sinking) = 100 µA | 6 | ||
| Supply Current, over temperature | ICC | 88 | 155 | µA | VOUT = 2 V, RL = 10 M, VCC = VRSP = 76 V; max at -40°C ≤ TA ≤ 125°C | 6 | |
| Input Offset Voltage Drift | TCVOS | 6 | µV/°C | 5 | |||
| Output Resistance / Load Regulation | ROUT | 0.1 | Ω | VSENSE = 100 mV | 5 | ||
| Output voltage with load | VOLOAD | 12 | V | VCC = 28 V, VRSP=28 V, VSENSE= 600 mV, IOUT (sourcing) = 500 µA | 6 | ||
| Output Load Regulation | VOLREG | 0.001 | % | VCC = 20, VRSP = 16, VOUT = 12, ΔIL = 200 na to 8 mA | 6 | ||
| -3 dB Bandwidth | BW | 270 | kHz | RL = 10 M, CL = 20 pF | 6 | ||
| Slew rate | SR | 1 | V/µs | VSENSE from 10 mV to 80 mV, RL = 10 M, CL = 20 pF | 6 | ||
| Input Referred Voltage Noise | eni | 95 | nV/√Hz | f = 1 kHz | 6 | ||
| Output Settling Time to 1% of Final Value | tSETTLE | 20 | µs | VSENSE = 10 mV to 100 mV and 100 mV to 10 mV | 6 | ||
| Power-up Time | tPU | 50 | µs | VCC = VRSP = 48 V, VSENSE = 100 mV, output to 1% of final value | 6 | ||
| Saturation Recovery Time | tRECOVERY | 50 | µs | Output settles to 1% of final value | 6 | ||
| Max Output Capacitance Load | CLOAD | 500 | pF | No sustained oscillations | 6 | ||
| Supply Voltage (VCC to GND) | VCC | -0.3 | 85 | V | 4 | ||
| RSP or RSN to GND | -0.3 | 85 | V | 4 | |||
| Differential Input Voltage | -85 | 85 | V | 4 | |||
| Current into output pin | -20 | 20 | mA | 4 | |||
| Current into any other pins | -5 | 5 | mA | 4 | |||
| Operating Temperature | -40 | 125 | °C | 4 | |||
| Junction Temperature | TJ | -40 | 150 | °C | 4 | ||
| Storage temperature | -65 | 150 | °C | 4 | |||
| ESD HBM | V(ESD) | -2000 | 2000 | V | Human-body model, ANSI/ESDA/JEDEC JS-001 | 4 | |
| ESD CDM | V(ESD) | -750 | 750 | V | Charged-device model, JESD22-C101 | 4 | |
| Supply Voltage | VCC | 4.5 | 76 | V | 4 | ||
| Common Mode Voltage | 4 | 76 | V | 4 | |||
| Junction-to-ambient thermal resistance | RθJA | 185 | °C/W | DGK package, 8 pins | 4 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | input pin pad, and ideally on the same copper layer with minimal vias or connectors. This can be important | 21 |
CAD (KiCad official)
- Symbol:
LMP8480MME-T - Footprint:
Package_SO:VSSOP-8_2.3x2mm_P0.5mm - 3D model: VSSOP-8 (KiCad packages3D, STEP)
- 3D model files:
lmp8480mme-t-etched.step/lmp8480mme-t-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lmp8480mme-t.step/lmp8480mme-t.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (30 pp, sha256
e95a84fefaef23c0, retrieved 2026-10-23, tier: manufacturer) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).