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LMK1D1216RGZR

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Texas Instruments Clock Buffers, Drivers, Distributors, VQFN-48-EP(7x7). Datasheet-verified pinout, KiCad symbol/footprint/3D.

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Contents

README

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LMK1D1216RGZR

Texas Instruments · Clock Buffers, Drivers, Distributors · VQFN-48-EP(7x7)

LMK1D1216RGZR from Texas Instruments, in a VQFN-48-EP(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground reference.
2 IN_SEL input Input selection with internal 500-kΩ pullup and 320-kΩ pulldown resistor; logic 0 selects IN0, logic 1 selects IN1, open disables outputs.
3 IN1_P input Secondary differential input pair positive or single-ended input; accepts LVDS, LVPECL, LP-HCSL, HCSL, CML, or LVCMOS signals.
4 IN1_N input Secondary differential input pair negative or single-ended input; paired with IN1_P.
5 VAC_REF1 output Bias voltage output for capacitive coupled inputs; TI recommends connecting a 0.1-µF capacitor to GND on this pin.
6 VDD power_in Device power supply; accepts 1.8 V, 2.5 V, or 3.3 V (see recommended operating conditions for tolerance).
7 VDD power_in Device power supply; accepts 1.8 V, 2.5 V, or 3.3 V (see recommended operating conditions for tolerance).
8 VAC_REF0 output Bias voltage output for capacitive coupled inputs; TI recommends connecting a 0.1-µF capacitor to GND on this pin.
9 IN0_N input Primary differential input pair negative or single-ended input; paired with IN0_P.
10 IN0_P input Primary differential input pair positive or single-ended input; accepts LVDS, LVPECL, LP-HCSL, HCSL, CML, or LVCMOS signals up to 2 GHz.
11 AMP_SEL input Output amplitude swing select with internal 500-kΩ pullup and 320-kΩ pulldown; logic 0 or open selects standard/standard swing (350 mV), logic 1 selects boosted/boosted swing (500 mV).
12 GND power_in Ground reference.
13 VDD power_in Device power supply; accepts 1.8 V, 2.5 V, or 3.3 V (see recommended operating conditions for tolerance).
14 OUT0_P output Differential LVDS output pair number 0 positive terminal; 50 Ω source impedance.
15 OUT0_N output Differential LVDS output pair number 0 negative terminal; paired with OUT0_P.
16 OUT1_P output Differential LVDS output pair number 1 positive terminal.
17 OUT1_N output Differential LVDS output pair number 1 negative terminal.
18 OUT2_P output Differential LVDS output pair number 2 positive terminal.
19 OUT2_N output Differential LVDS output pair number 2 negative terminal.
20 OUT3_P output Differential LVDS output pair number 3 positive terminal.
21 OUT3_N output Differential LVDS output pair number 3 negative terminal.
22 OUT4_P output Differential LVDS output pair number 4 positive terminal.
23 OUT4_N output Differential LVDS output pair number 4 negative terminal.
24 VDD power_in Device power supply; accepts 1.8 V, 2.5 V, or 3.3 V (see recommended operating conditions for tolerance).
25 OUT5_P output Differential LVDS output pair number 5 positive terminal.
26 OUT5_N output Differential LVDS output pair number 5 negative terminal.
27 OUT6_P output Differential LVDS output pair number 6 positive terminal.
28 OUT6_N output Differential LVDS output pair number 6 negative terminal.
29 OUT7_P output Differential LVDS output pair number 7 positive terminal.
30 OUT7_N output Differential LVDS output pair number 7 negative terminal.
31 OUT8_P output Differential LVDS output pair number 8 positive terminal.
32 OUT8_N output Differential LVDS output pair number 8 negative terminal.
33 OUT9_P output Differential LVDS output pair number 9 positive terminal.
34 OUT9_N output Differential LVDS output pair number 9 negative terminal.
35 OUT10_P output Differential LVDS output pair number 10 positive terminal.
36 OUT10_N output Differential LVDS output pair number 10 negative terminal.
37 VDD power_in Device power supply; accepts 1.8 V, 2.5 V, or 3.3 V (see recommended operating conditions for tolerance).
38 OUT11_P output Differential LVDS output pair number 11 positive terminal.
39 OUT11_N output Differential LVDS output pair number 11 negative terminal.
40 OUT12_P output Differential LVDS output pair number 12 positive terminal.
41 OUT12_N output Differential LVDS output pair number 12 negative terminal.
42 OUT13_P output Differential LVDS output pair number 13 positive terminal.
43 OUT13_N output Differential LVDS output pair number 13 negative terminal.
44 OUT14_P output Differential LVDS output pair number 14 positive terminal.
45 OUT14_N output Differential LVDS output pair number 14 negative terminal.
46 OUT15_P output Differential LVDS output pair number 15 positive terminal.
47 OUT15_N output Differential LVDS output pair number 15 negative terminal.
48 VDD power_in Device power supply; accepts 1.8 V, 2.5 V, or 3.3 V (see recommended operating conditions for tolerance).
49 DAP power_in Die attach pad (thermal pad); connect to printed circuit board ground plane for heat dissipation and mechanical support.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-48-EP(7x7)
Category Clock/Timing
Pins 49

CAD (KiCad official)

  • Symbol: LMK1D1216RGZR
  • Footprint: Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm
  • 3D model: VQFN-48-EP(7x7) (KiCad packages3D, STEP)
  • 3D model files: lmk1d1216rgzr-etched.step / lmk1d1216rgzr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lmk1d1216rgzr.step / lmk1d1216rgzr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (37 pp, sha256 002c4e8b0e1c8e35, retrieved 2026-09-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF