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Contents

README

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LMK1C1102PWR

Texas Instruments · Clock Buffers, Drivers, Distributors · TSSOP-8

LMK1C1102PWR from Texas Instruments, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CLKIN input Single-ended clock input with internal 300-kΩ (typical) pulldown resistor to GND.
2 1G input Global Output Enable with internal 300-kΩ (typical) pulldown resistor to GND; HIGH enables outputs, LOW disables outputs.
3 Y0 output LVCMOS clock output, typically connected to a receiver.
4 GND power_in Ground.
5 NC unconnected No connect.
6 VDD power_in Power supply terminal for 3.3-V, 2.5-V, or 1.8-V supply.
7 NC unconnected No connect.
8 Y1 output LVCMOS clock output, typically connected to a receiver.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-8
Category Clock/Timing
Pins 8

CAD (KiCad official)

  • Symbol: LMK1C1102PWR
  • Footprint: Package_SO:TSSOP-8_3x3mm_P0.65mm
  • 3D model: TSSOP-8 (KiCad packages3D, STEP)
  • 3D model files: lmk1c1102pwr-etched.step / lmk1c1102pwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lmk1c1102pwr.step / lmk1c1102pwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (27 pp, sha256 4403ce872cf97948, retrieved 2026-10-03, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF