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Contents

Pinout
Key specifications
CAD (KiCad official)
Provenance

README

markdown

LMK03806BISQX

Texas Instruments · Clock Generators / Frequency Synthesizers / PLL · WQFN-64-EP(9x9)

LMK03806BISQX from Texas Instruments, in a WQFN-64-EP(9x9). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	CLKout0	output	Programmable clock output 0 (clock group 0), selectable as LVDS, LVPECL or LVCMOS.
2	CLKout0*	output	Complementary pin of programmable clock output 0 (clock group 0), selectable as LVDS, LVPECL or LVCMOS.
3	CLKout1*	output	Complementary pin of programmable clock output 1 (clock group 0), selectable as LVDS, LVPECL or LVCMOS.
4	CLKout1	output	Programmable clock output 1 (clock group 0), selectable as LVDS, LVPECL or LVCMOS.
5	NC	unconnected	Do not connect; this pin must be left floating and must NOT be grounded.
6	SYNC	input	Clock synchronization input (CMOS).
7	NC	unconnected	Do not connect; this pin must be left floating and must NOT be grounded.
8	NC	unconnected	Do not connect; this pin must be left floating and must NOT be grounded.
9	NC	unconnected	Do not connect; this pin must be left floating and must NOT be grounded.
10	Vcc1	power_in	Power supply for the VCO LDO.
11	LDObyp1	passive	LDO bypass pin, bypassed to ground with a 10 µF capacitor.
12	LDObyp2	passive	LDO bypass pin, bypassed to ground with a 0.1 µF capacitor.
13	CLKout2	output	Programmable clock output 2 (clock group 1), selectable as LVDS, LVPECL or LVCMOS.
14	CLKout2*	output	Complementary pin of programmable clock output 2 (clock group 1), selectable as LVDS, LVPECL or LVCMOS.
15	CLKout3*	output	Complementary pin of programmable clock output 3 (clock group 1), selectable as LVDS, LVPECL or LVCMOS.
16	CLKout3	output	Programmable clock output 3 (clock group 1), selectable as LVDS, LVPECL or LVCMOS.
17	Vcc2	power_in	Power supply for clock group 1: CLKout2 and CLKout3.
18	Vcc3	power_in	Power supply for clock group 2: CLKout4 and CLKout5.
19	CLKout4	output	Programmable clock output 4 (clock group 2), selectable as LVDS, LVPECL or LVCMOS.
20	CLKout4*	output	Complementary pin of programmable clock output 4 (clock group 2), selectable as LVDS, LVPECL or LVCMOS.
21	CLKout5*	output	Complementary pin of programmable clock output 5 (clock group 2), selectable as LVDS, LVPECL or LVCMOS.
22	CLKout5	output	Programmable clock output 5 (clock group 2), selectable as LVDS, LVPECL or LVCMOS.
23	GND	power_in	Ground.
24	Vcc4	power_in	Power supply for digital circuitry.
25	NC	unconnected	Do not connect; this pin must be left floating and must NOT be grounded.
26	NC	unconnected	Do not connect; this pin must be left floating and must NOT be grounded.
27	Readback	output	CMOS pin that can be used to read back register information.
28	NC	unconnected	Do not connect; this pin must be left floating and must NOT be grounded.
29	NC	unconnected	Do not connect; this pin must be left floating and must NOT be grounded.
30	Vcc5	power_in	Power supply for clock inputs.
31	OSCout1	output	LVPECL buffered output 1 of the OSCin port.
32	OSCout1*	output	Complementary LVPECL buffered output 1 of the OSCin port.
33	Ftest/LD	output	Programmable multiplexed lock detect and test output pin.
34	NC	unconnected	Do not connect; this pin must be left floating and must NOT be grounded.
35	Vcc6	power_in	Power supply; no bypassing required on this pin.
36	OSCin	input	Reference input to the PLL; may be a crystal for the internal crystal oscillator circuit, or an XO, TCXO or other external clock that must be AC coupled.
37	OSCin*	input	Complementary reference input to the PLL; external clock sources must be AC coupled.
38	Vcc7	power_in	Power supply for the OSCin port.
39	OSCout0	output	Programmable buffered output 0 of the OSCin port.
40	OSCout0*	output	Complementary programmable buffered output 0 of the OSCin port.
41	Vcc8	power_in	Power supply for the PLL charge pump.
42	CPout	output	Charge pump output (analog).
43	Vcc9	power_in	Power supply for the PLL.
44	LEuWire	input	CMOS MICROWIRE latch enable input.
45	CLKuWire	input	CMOS MICROWIRE clock input.
46	DATAuWire	input	CMOS MICROWIRE data input.
47	Vcc10	power_in	Power supply for clock group 3: CLKout6 and CLKout7.
48	CLKout6	output	Programmable clock output 6 (clock group 3), selectable as LVDS, LVPECL or LVCMOS.
49	CLKout6*	output	Complementary pin of programmable clock output 6 (clock group 3), selectable as LVDS, LVPECL or LVCMOS.
50	CLKout7*	output	Complementary pin of programmable clock output 7 (clock group 3), selectable as LVDS, LVPECL or LVCMOS.
51	CLKout7	output	Programmable clock output 7 (clock group 3), selectable as LVDS, LVPECL or LVCMOS.
52	Vcc11	power_in	Power supply for clock group 4: CLKout8 and CLKout9.
53	CLKout8	output	Programmable clock output 8 (clock group 4), selectable as LVDS, LVPECL or LVCMOS.
54	CLKout8*	output	Complementary pin of programmable clock output 8 (clock group 4), selectable as LVDS, LVPECL or LVCMOS.
55	CLKout9*	output	Complementary pin of programmable clock output 9 (clock group 4), selectable as LVDS, LVPECL or LVCMOS.
56	CLKout9	output	Programmable clock output 9 (clock group 4), selectable as LVDS, LVPECL or LVCMOS.
57	Vcc12	power_in	Power supply for clock group 5: CLKout10 and CLKout11.
58	CLKout10	output	Programmable clock output 10 (clock group 5), selectable as LVDS, LVPECL or LVCMOS.
59	CLKout10*	output	Complementary pin of programmable clock output 10 (clock group 5), selectable as LVDS, LVPECL or LVCMOS.
60	CLKout11*	output	Complementary pin of programmable clock output 11 (clock group 5), selectable as LVDS, LVPECL or LVCMOS.
61	CLKout11	output	Programmable clock output 11 (clock group 5), selectable as LVDS, LVPECL or LVCMOS.
62	GPout0	output	CMOS pin that can be programmed for general-purpose output.
63	GPout1	output	CMOS pin that can be programmed for general-purpose output.
64	Vcc13	power_in	Power supply for clock group 0: CLKout0 and CLKout1.
65	EP	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	WQFN-64-EP(9x9)
Category	RTC/Clock Chip
Pins	65

CAD (KiCad official)

Symbol: LMK03806BISQX
Footprint: Package_DFN_QFN:QFN-64-1EP_9x9mm_P0.5mm_EP6x6mm
3D model: WQFN-64-EP(9x9) (KiCad packages3D, STEP)
3D model files: lmk03806bisqx-etched.step / lmk03806bisqx-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lmk03806bisqx.step / lmk03806bisqx.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (70 pp, sha256 5b47d3ff1374ae26, retrieved 2026-10-08, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF