# LMK03033CISQE

**Texas Instruments** · Clock Generators / Frequency Synthesizers / PLL · WQFN-48-EP(7x7)

LMK03033CISQE from Texas Instruments, in a WQFN-48-EP(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground pin. |
| 2 | Fout | output | Internal VCO frequency output, enabled only when the EN_Fout bit is set (default disabled). |
| 3 | Vcc1 | power_in | Power supply pin; VCC is 3.15 V to 3.45 V (3.3 V typical). |
| 4 | CLKuWire | input | MICROWIRE clock input. |
| 5 | DATAuWire | input | MICROWIRE data input. |
| 6 | LEuWire | input | MICROWIRE latch enable input. |
| 7 | NC | unconnected | No connection to this pin. |
| 8 | Vcc2 | power_in | Power supply pin; VCC is 3.15 V to 3.45 V (3.3 V typical). |
| 9 | LDObyp1 | passive | LDO bypass pin, to be bypassed as described in the LDO bypass section. |
| 10 | LDObyp2 | passive | LDO bypass pin, to be bypassed as described in the LDO bypass section. |
| 11 | GOE | input | Global output enable input; the datasheet gives no further limit for this pin. |
| 12 | LD | output | Lock detect and test output; output mode is set by PLL_MUX[3:0] (default Hi-Z, disabled). |
| 13 | Vcc3 | power_in | Power supply pin; VCC is 3.15 V to 3.45 V (3.3 V typical). |
| 14 | CLKout0 | output | LVDS clock output 0, true side. |
| 15 | CLKout0* | output | LVDS clock output 0, complementary side. |
| 16 | Vcc4 | power_in | Power supply pin; VCC is 3.15 V to 3.45 V (3.3 V typical). |
| 17 | CLKout1 | output | LVDS clock output 1, true side. |
| 18 | CLKout1* | output | LVDS clock output 1, complementary side. |
| 19 | Vcc5 | power_in | Power supply pin; VCC is 3.15 V to 3.45 V (3.3 V typical). |
| 20 | CLKout2 | output | LVDS clock output 2, true side. |
| 21 | CLKout2* | output | LVDS clock output 2, complementary side. |
| 22 | Vcc6 | power_in | Power supply pin; VCC is 3.15 V to 3.45 V (3.3 V typical). |
| 23 | CLKout3 | output | Clock output 3, true side; LVDS for the LMK03033C per the pin table. |
| 24 | CLKout3* | output | Clock output 3, complementary side; LVDS for the LMK03033C per the pin table. |
| 25 | GND | power_in | Ground pin. |
| 26 | Vcc7 | power_in | Power supply pin; VCC is 3.15 V to 3.45 V (3.3 V typical). |
| 27 | SYNC* | input | Global clock output synchronization input. |
| 28 | OSCin | input | Oscillator clock input; should be AC coupled. |
| 29 | OSCin* | input | Complementary oscillator clock input; should be AC coupled. |
| 30 | Vcc8 | power_in | Power supply pin; VCC is 3.15 V to 3.45 V (3.3 V typical). |
| 31 | Vcc9 | power_in | Power supply pin; VCC is 3.15 V to 3.45 V (3.3 V typical). |
| 32 | CPout | output | PLL charge pump output. |
| 33 | Vcc10 | power_in | Power supply pin; VCC is 3.15 V to 3.45 V (3.3 V typical). |
| 34 | NC | unconnected | No connection to this pin. |
| 35 | NC | unconnected | No connection to this pin. |
| 36 | Bias | passive | Bias bypass pin. |
| 37 | Vcc11 | power_in | Power supply pin; VCC is 3.15 V to 3.45 V (3.3 V typical). |
| 38 | CLKout4 | output | LVPECL clock output 4, true side. |
| 39 | CLKout4* | output | LVPECL clock output 4, complementary side. |
| 40 | Vcc12 | power_in | Power supply pin; VCC is 3.15 V to 3.45 V (3.3 V typical). |
| 41 | CLKout5 | output | LVPECL clock output 5, true side. |
| 42 | CLKout5* | output | LVPECL clock output 5, complementary side. |
| 43 | Vcc13 | power_in | Power supply pin; VCC is 3.15 V to 3.45 V (3.3 V typical). |
| 44 | CLKout6 | output | LVPECL clock output 6, true side. |
| 45 | CLKout6* | output | LVPECL clock output 6, complementary side. |
| 46 | Vcc14 | power_in | Power supply pin; VCC is 3.15 V to 3.45 V (3.3 V typical). |
| 47 | CLKout7 | output | LVPECL clock output 7, true side. |
| 48 | CLKout7* | output | LVPECL clock output 7, complementary side. |
| 49 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WQFN-48-EP(7x7) |
| Category | RTC/Clock Chip |
| Pins | 49 |

## CAD (KiCad official)

- Symbol: `LMK03033CISQE`
- Footprint: `Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm`
- 3D model: WQFN-48-EP(7x7) (KiCad packages3D, STEP)
- 3D model files: `lmk03033cisqe-etched.step` / `lmk03033cisqe-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lmk03033cisqe.step` / `lmk03033cisqe.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/lmk03000) (48 pp, sha256 `0cf7a425324a1ad2`, retrieved 2026-10-11, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/lmk03033cisqe-datasheet.pdf)