component
LMK00804BQWRGTRQ1
Public Made by Adomby adom
Texas Instruments Clock Buffers, Drivers, VQFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownLMK00804BQWRGTRQ1
Texas Instruments · Clock Buffers, Drivers · VQFN-16-EP(3x3)
LMK00804BQWRGTRQ1 from Texas Instruments, in a VQFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Power supply ground |
| 2 | NC | unconnected | No connect pin; do not connect to GND |
| 3 | VDD | power_in | Power supply input terminal; supply voltage 3.135 to 3.465 V nominal 3.3 V |
| 4 | CLK_EN | input | Synchronous clock enable input; 0 forces outputs to logic low state, 1 enables outputs with LVCMOS/LVTTL levels |
| 5 | CLK_P | input | Noninverting differential clock input with internal 51-kΩ pulldown resistor to GND; accepts LVPECL, LVDS, HCSL, SSTL, LVHSTL or LVCMOS/LVTTL |
| 6 | CLK_N | input | Inverting differential clock input with internal 51-kΩ pullup resistor to VDD and 51-kΩ pulldown to GND; internally biased to VDD/2 when floating |
| 7 | CLK_SEL | input | Clock select input; 0 selects LVCMOS_CLK (pin 8), 1 selects CLK_P/CLK_N (pins 5, 6) |
| 8 | LVCMOS_CLK | input | Single-ended clock input with internal 51-kΩ pulldown resistor to GND; accepts LVCMOS/LVTTL levels |
| 9 | GND | power_in | Power supply ground |
| 10 | Q3 | output | Single-ended clock output with LVCMOS/LVTTL levels at 7-Ω impedance; maximum frequency 350 MHz |
| 11 | VDDO | power_in | Output power supply terminal; supply voltage 3.135 to 3.465 V, 2.375 to 2.625 V, 1.71 to 1.89 V, or 1.425 to 1.575 V |
| 12 | Q2 | output | Single-ended clock output with LVCMOS/LVTTL levels at 7-Ω impedance; maximum frequency 350 MHz |
| 13 | GND | power_in | Power supply ground |
| 14 | Q1 | output | Single-ended clock output with LVCMOS/LVTTL levels at 7-Ω impedance; maximum frequency 350 MHz |
| 15 | VDDO | power_in | Output power supply terminal; supply voltage 3.135 to 3.465 V, 2.375 to 2.625 V, 1.71 to 1.89 V, or 1.425 to 1.575 V |
| 16 | Q0 | output | Single-ended clock output with LVCMOS/LVTTL levels at 7-Ω impedance; maximum frequency 350 MHz |
| 17 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-16-EP(3x3) |
| Category | RTC/Clock Chip |
| Pins | 17 |
CAD (KiCad official)
- Symbol:
LMK00804BQWRGTRQ1 - Footprint:
Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm - 3D model: VQFN-16-EP(3x3) (KiCad packages3D, STEP)
- 3D model files:
lmk00804bqwrgtrq1-etched.step/lmk00804bqwrgtrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lmk00804bqwrgtrq1.step/lmk00804bqwrgtrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (29 pp, sha256
b58ecb79387c6fb9, retrieved 2026-10-05, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).