component
LMK00334RTVR
Public Made by Adomby adom
Texas Instruments Clock Buffers, Drivers, Distributors, WQFN-32-EP(5x5). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+276−8@@ -1,13 +1,286 @@ {+ "schema_version": 1,+ "type": "component", "slug": "lmk00334rtvr",+ "title": "LMK00334RTVR",+ "brief": "Texas Instruments Clock Buffers, Drivers, Distributors, WQFN-32-EP(5x5). Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "Texas Instruments Clock Buffers, Drivers, Distributors, WQFN-32-EP(5x5). Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "clock-timing", "lmk00334rtvr" ],+ "component": {+ "mpn": "LMK00334RTVR",+ "manufacturer": "Texas Instruments",+ "package": "WQFN-32-EP(5x5)",+ "pin_count": 33,+ "category": "Clock/Timing",+ "subcategory": "Clock Buffers, Drivers, Distributors",+ "datasheet": "https://www.ti.com/cn/lit/gpn/lmk00334",+ "parts": {+ "symbol": "lmk00334rtvr.kicad_sym",+ "footprint": "lmk00334rtvr.kicad_mod",+ "model_3d": "lmk00334rtvr.glb",+ "model_3d_step": "lmk00334rtvr.step",+ "lbr": "lmk00334rtvr.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "GND",+ "type": "power_in",+ "description": "Ground return."+ },+ {+ "number": "2",+ "name": "VCCOA",+ "type": "power_in",+ "description": "Output supply for Bank A output buffers. 3.3 V or 2.5 V. Pin 2 and pin 5 are internally connected; bypass with 0.1 \u00b5F low-ESR capacitor near each pin."+ },+ {+ "number": "3",+ "name": "CLKoutA0",+ "type": "output",+ "description": "Differential clock output A0 (true). HCSL or Hi-Z."+ },+ {+ "number": "4",+ "name": "CLKoutA0*",+ "type": "output",+ "description": "Differential clock output A0 (complement). HCSL or Hi-Z."+ },+ {+ "number": "5",+ "name": "VCCOA",+ "type": "power_in",+ "description": "Output supply for Bank A output buffers. 3.3 V or 2.5 V. Internally tied to pin 2; bypass with 0.1 \u00b5F near pin."+ },+ {+ "number": "6",+ "name": "CLKoutA1",+ "type": "output",+ "description": "Differential clock output A1 (true). HCSL or Hi-Z."+ },+ {+ "number": "7",+ "name": "CLKoutA1*",+ "type": "output",+ "description": "Differential clock output A1 (complement). HCSL or Hi-Z."+ },+ {+ "number": "8",+ "name": "GND",+ "type": "power_in",+ "description": "Ground return."+ },+ {+ "number": "9",+ "name": "CLKout_EN",+ "type": "input",+ "description": "Bank A and Bank B output enable, active-high. CMOS control input with internal pulldown."+ },+ {+ "number": "10",+ "name": "VCC",+ "type": "power_in",+ "description": "Core and input buffer supply. 3.3 V. Bypass each VCC pin with a 0.1 \u00b5F low-ESR capacitor."+ },+ {+ "number": "11",+ "name": "OSCin",+ "type": "input",+ "description": "Crystal input; may also be driven by an XO/TCXO or other external single-ended clock."+ },+ {+ "number": "12",+ "name": "OSCout",+ "type": "output",+ "description": "Crystal output. If OSCin is driven by a single-ended clock, OSCout should be left floating."+ },+ {+ "number": "13",+ "name": "CLKin_SEL0",+ "type": "input",+ "description": "Clock input MUX select 0. CMOS control input with internal pulldown."+ },+ {+ "number": "14",+ "name": "CLKin0",+ "type": "input",+ "description": "Universal clock input 0, true (differential or single-ended)."+ },+ {+ "number": "15",+ "name": "CLKin0*",+ "type": "input",+ "description": "Universal clock input 0, complement (differential or single-ended)."+ },+ {+ "number": "16",+ "name": "CLKin_SEL1",+ "type": "input",+ "description": "Clock input MUX select 1. CMOS control input with internal pulldown."+ },+ {+ "number": "17",+ "name": "GND",+ "type": "power_in",+ "description": "Ground return."+ },+ {+ "number": "18",+ "name": "CLKoutB1*",+ "type": "output",+ "description": "Differential clock output B1 (complement). HCSL or Hi-Z."+ },+ {+ "number": "19",+ "name": "CLKoutB1",+ "type": "output",+ "description": "Differential clock output B1 (true). HCSL or Hi-Z."+ },+ {+ "number": "20",+ "name": "VCCOB",+ "type": "power_in",+ "description": "Output supply for Bank B output buffers. 3.3 V or 2.5 V. Pin 20 and pin 23 are internally tied; bypass with 0.1 \u00b5F near each pin."+ },+ {+ "number": "21",+ "name": "CLKoutB0*",+ "type": "output",+ "description": "Differential clock output B0 (complement). HCSL or Hi-Z."+ },+ {+ "number": "22",+ "name": "CLKoutB0",+ "type": "output",+ "description": "Differential clock output B0 (true). HCSL or Hi-Z."+ },+ {+ "number": "23",+ "name": "VCCOB",+ "type": "power_in",+ "description": "Output supply for Bank B output buffers. 3.3 V or 2.5 V. Internally tied to pin 20; bypass with 0.1 \u00b5F near pin."+ },+ {+ "number": "24",+ "name": "GND",+ "type": "power_in",+ "description": "Ground return."+ },+ {+ "number": "25",+ "name": "NC",+ "type": "unconnected",+ "description": "No internal connection. May be left floating, tied to GND, or tied to any potential within the Absolute Maximum supply range."+ },+ {+ "number": "26",+ "name": "CLKin1*",+ "type": "input",+ "description": "Universal clock input 1, complement (differential or single-ended)."+ },+ {+ "number": "27",+ "name": "CLKin1",+ "type": "input",+ "description": "Universal clock input 1, true (differential or single-ended)."+ },+ {+ "number": "28",+ "name": "VCC",+ "type": "power_in",+ "description": "Core and input buffer supply. 3.3 V. Bypass with 0.1 \u00b5F low-ESR capacitor near pin."+ },+ {+ "number": "29",+ "name": "REFout",+ "type": "output",+ "description": "LVCMOS reference output. Enabled by driving REFout_EN high."+ },+ {+ "number": "30",+ "name": "VCCOC",+ "type": "power_in",+ "description": "Supply for the REFout buffer. 3.3 V or 2.5 V. Bypass with 0.1 \u00b5F low-ESR capacitor near pin."+ },+ {+ "number": "31",+ "name": "REFout_EN",+ "type": "input",+ "description": "REFout enable, active-high. Also synchronizes REFout with the selected clock input internally. CMOS input with internal pulldown."+ },+ {+ "number": "32",+ "name": "VCC",+ "type": "power_in",+ "description": "Core and input buffer supply. 3.3 V. Bypass with 0.1 \u00b5F low-ESR capacitor near pin."+ },+ {+ "number": "DAP",+ "name": "DAP",+ "type": "power_in",+ "description": "Die attach pad. Must be soldered to the PCB ground plane for thermal dissipation."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/lmk00334",+ "pages": 35,+ "sha256": "0fea59e58d9782db",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 33,+ "described": 33,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "Texas Instruments",+ "Package": "WQFN-32-EP(5x5)",+ "Category": "Clock/Timing",+ "Pins": "33"+ }+ },+ "variants": [+ {+ "mpn": "LMK00334RTVR",+ "kind": "packaging"+ },+ {+ "mpn": "LMK00334RTVRRTVT",+ "kind": "packaging"+ }+ ],+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "lmk00334rtvr"+ ],+ "discovery_pitch": "LMK00334RTVR (Texas Instruments) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +298,5 @@ "docs/lmk00334rtvr-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }