component
LMK00105SQE
Public Made by Adomby adom
Texas Instruments Clock Buffers, Drivers, Distributors, WQFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
LMK00105SQE
Texas Instruments · Clock Buffers, Drivers, Distributors · WQFN-24-EP(4x4)
LMK00105SQE from Texas Instruments, in a WQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground pin. |
| 2 | Vddo | power_in | Power supply for Bank A (CLKout0 and CLKout1) clock output pins. |
| 3 | CLKout0 | output | LVCMOS clock output, supplied from the Bank A Vddo. |
| 4 | GND | power_in | Ground pin. |
| 5 | CLKout1 | output | LVCMOS clock output, supplied from the Bank A Vddo. |
| 6 | Vddo | power_in | Power supply for Bank A (CLKout0 and CLKout1) clock output pins. |
| 7 | GND | power_in | Ground pin. |
| 8 | Vdd | power_in | Power supply for the operating core and input buffer. |
| 9 | OSCin | input | Crystal input; accepts a crystal for the internal oscillator. |
| 10 | OSCout | output | Crystal output for the internal oscillator. |
| 11 | GND | power_in | Ground pin. |
| 12 | GND | power_in | Ground pin. |
| 13 | CLKout2 | output | LVCMOS clock output, supplied from the Bank B Vddo. |
| 14 | Vddo | power_in | Power supply for Bank B (CLKout2 to CLKout4) clock output pins. |
| 15 | CLKout3 | output | LVCMOS clock output, supplied from the Bank B Vddo. |
| 16 | GND | power_in | Ground pin. |
| 17 | CLKout4 | output | LVCMOS clock output, supplied from the Bank B Vddo. |
| 18 | Vddo | power_in | Power supply for Bank B (CLKout2 to CLKout4) clock output pins. |
| 19 | GND | power_in | Ground pin. |
| 20 | CLKin* | input | Complementary clock input, paired with CLKin for differential input operation. |
| 21 | CLKin | input | Clock input pin. |
| 22 | SEL | input | Input clock selection; has an internal pulldown resistor. |
| 23 | Vdd | power_in | Power supply for the operating core and input buffer. |
| 24 | OE | input | Output enable; has an internal pulldown resistor (CMOS control input). |
| 25 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WQFN-24-EP(4x4) |
| Category | Clock/Timing |
| Pins | 25 |
CAD (KiCad official)
- Symbol:
LMK00105SQE - Footprint:
Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm - 3D model: WQFN-24-EP(4x4) (KiCad packages3D, STEP)
- 3D model files:
lmk00105sqe-etched.step/lmk00105sqe-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lmk00105sqe.step/lmk00105sqe.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (31 pp, sha256
3afaf41a6e9bd99d, retrieved 2026-10-07, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# LMK00105SQE
**Texas Instruments** · Clock Buffers, Drivers, Distributors · WQFN-24-EP(4x4)
LMK00105SQE from Texas Instruments, in a WQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground pin. |
| 2 | Vddo | power_in | Power supply for Bank A (CLKout0 and CLKout1) clock output pins. |
| 3 | CLKout0 | output | LVCMOS clock output, supplied from the Bank A Vddo. |
| 4 | GND | power_in | Ground pin. |
| 5 | CLKout1 | output | LVCMOS clock output, supplied from the Bank A Vddo. |
| 6 | Vddo | power_in | Power supply for Bank A (CLKout0 and CLKout1) clock output pins. |
| 7 | GND | power_in | Ground pin. |
| 8 | Vdd | power_in | Power supply for the operating core and input buffer. |
| 9 | OSCin | input | Crystal input; accepts a crystal for the internal oscillator. |
| 10 | OSCout | output | Crystal output for the internal oscillator. |
| 11 | GND | power_in | Ground pin. |
| 12 | GND | power_in | Ground pin. |
| 13 | CLKout2 | output | LVCMOS clock output, supplied from the Bank B Vddo. |
| 14 | Vddo | power_in | Power supply for Bank B (CLKout2 to CLKout4) clock output pins. |
| 15 | CLKout3 | output | LVCMOS clock output, supplied from the Bank B Vddo. |
| 16 | GND | power_in | Ground pin. |
| 17 | CLKout4 | output | LVCMOS clock output, supplied from the Bank B Vddo. |
| 18 | Vddo | power_in | Power supply for Bank B (CLKout2 to CLKout4) clock output pins. |
| 19 | GND | power_in | Ground pin. |
| 20 | CLKin* | input | Complementary clock input, paired with CLKin for differential input operation. |
| 21 | CLKin | input | Clock input pin. |
| 22 | SEL | input | Input clock selection; has an internal pulldown resistor. |
| 23 | Vdd | power_in | Power supply for the operating core and input buffer. |
| 24 | OE | input | Output enable; has an internal pulldown resistor (CMOS control input). |
| 25 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WQFN-24-EP(4x4) |
| Category | Clock/Timing |
| Pins | 25 |
## CAD (KiCad official)
- Symbol: `LMK00105SQE`
- Footprint: `Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm`
- 3D model: WQFN-24-EP(4x4) (KiCad packages3D, STEP)
- 3D model files: `lmk00105sqe-etched.step` / `lmk00105sqe-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lmk00105sqe.step` / `lmk00105sqe.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/lmk00105) (31 pp, sha256 `3afaf41a6e9bd99d`, retrieved 2026-10-07, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/lmk00105sqe-datasheet.pdf)