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LMH0376SQE
Public Made by Adomby adom
Texas Instruments Video Interface ICs, WQFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 12d ago |
| viewers | 12d ago |
| lmh0376sqe-etched.glb | 12d ago |
| lmh0376sqe-etched.step | 12d ago |
| lmh0376sqe-hero.glb | 12d ago |
| lmh0376sqe-hero.overlay.json | 12d ago |
| lmh0376sqe.glb | 12d ago |
| lmh0376sqe.kicad_mod | 12d ago |
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| README.md | 12d ago |
LMH0376SQE
Texas Instruments · Video Interface ICs · WQFN-48-EP(7x7)
LMH0376SQE from Texas Instruments, in a WQFN-48-EP(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SDI0 | input | Serial data differential input 0, a 3 Gbps SDI input with on-chip 100 Ω termination and FR4 equalization of up to 60 inches. |
| 2 | ~SDI0 | input | Complement of serial data differential input 0 (SDI0), forming the differential pair with pin 1. |
| 3 | VCC | power_in | Positive power supply, 2.5 V nominal (2.375 V to 2.625 V recommended). |
| 4 | SDI1 | input | Serial data differential input 1, a 3 Gbps SDI input with on-chip 100 Ω termination and FR4 equalization of up to 60 inches. |
| 5 | ~SDI1 | input | Complement of serial data differential input 1 (SDI1), forming the differential pair with pin 4. |
| 6 | VCC | power_in | Positive power supply, 2.5 V nominal (2.375 V to 2.625 V recommended). |
| 7 | SDI2 | input | Serial data differential input 2, a 3 Gbps SDI input with on-chip 100 Ω termination and FR4 equalization of up to 60 inches. |
| 8 | ~SDI2 | input | Complement of serial data differential input 2 (SDI2), forming the differential pair with pin 7. |
| 9 | ENABLE | input | Device enable with internal pullup: high enables normal operation and low powers the device down. |
| 10 | SDI3 | input | Serial data differential input 3, a 3 Gbps SDI input with on-chip 100 Ω termination and FR4 equalization of up to 60 inches. |
| 11 | ~SDI3 | input | Complement of serial data differential input 3 (SDI3), forming the differential pair with pin 10. |
| 12 | VCC | power_in | Positive power supply, 2.5 V nominal (2.375 V to 2.625 V recommended). |
| 13 | VEE | power_in | Negative power supply (ground). |
| 14 | VCC | power_in | Positive power supply, 2.5 V nominal (2.375 V to 2.625 V recommended). |
| 15 | BYPASS | input | Reclocker bypass with internal pulldown: high bypasses reclocking and low gives normal operation. |
| 16 | MUTE | input | Output mute with internal pullup: high gives normal operation and low mutes the SDO0 and SDO1 outputs. |
| 17 | SPI_EN | input | SPI register access enable with internal pulldown: high selects SPI register access mode and low selects pin mode. |
| 18 | XTAL_IN | input | External crystal or clock input for an optional 27 MHz reference; connect to ground for referenceless operation. |
| 19 | VEE | power_in | Negative power supply (ground). |
| 20 | VEE | power_in | Negative power supply (ground). |
| 21 | VEE | power_in | Negative power supply (ground). |
| 22 | XTAL_OUT | output | External crystal or clock output for the optional 27 MHz reference. |
| 23 | VEE | power_in | Negative power supply (ground). |
| 24 | LOCK_DETECT | output | LVCMOS PLL lock detect status: high when the PLL is locked and low when it is not locked. |
| 25 | VEE | power_in | Negative power supply (ground). |
| 26 | VEE | power_in | Negative power supply (ground). |
| 27 | VEE | power_in | Negative power supply (ground). |
| 28 | SDO1 | output | Serial data differential output 1 (LVDS) with programmable common-mode voltage, swing and de-emphasis up to 40 inches of FR4. |
| 29 | ~SDO1 | output | Complement of serial data differential output 1 (SDO1), forming the LVDS pair with pin 28. |
| 30 | VCC | power_in | Positive power supply, 2.5 V nominal (2.375 V to 2.625 V recommended). |
| 31 | VCC | power_in | Positive power supply, 2.5 V nominal (2.375 V to 2.625 V recommended). |
| 32 | SDO0 | output | Serial data differential output 0 (LVDS) with programmable common-mode voltage, swing and de-emphasis up to 40 inches of FR4. |
| 33 | ~SDO0 | output | Complement of serial data differential output 0 (SDO0), forming the LVDS pair with pin 32. |
| 34 | VCC | power_in | Positive power supply, 2.5 V nominal (2.375 V to 2.625 V recommended). |
| 35 | VCC | power_in | Positive power supply, 2.5 V nominal (2.375 V to 2.625 V recommended). |
| 36 | SD/HD | output | LVCMOS data rate range indication: high when the locked data rate is SD, and low when it is 3G or HD or the PLL is unlocked. |
| 37 | SCO_EN | input | Serial clock output enable for SDO1 with internal pulldown: high makes SDO1 a serial clock output and low makes it serial data. |
| 38 | VEE | power_in | Negative power supply (ground). |
| 39 | VEE | power_in | Negative power supply (ground). |
| 40 | VEE | power_in | Negative power supply (ground). |
| 41 | VEE | power_in | Negative power supply (ground). |
| 42 | VEE | power_in | Negative power supply (ground). |
| 43 | LF1 | passive | Loop filter terminal; connect a 56 nF capacitor between LF1 and LF2. |
| 44 | LF2 | passive | Loop filter terminal; connect a 56 nF capacitor between LF1 and LF2. |
| 45 | RATE0 | input | Data rate select input with internal pulldown, one of the two rate-select bits (RATE0 and RATE1). |
| 46 | RATE1 | input | Data rate select input with internal pulldown, one of the two rate-select bits (RATE0 and RATE1). |
| 47 | SEL0 | input | Input channel select input with internal pulldown, one of the two channel-select bits (SEL0 and SEL1) for the 4:1 input multiplexer. |
| 48 | SEL1 | input | Input channel select input with internal pulldown, one of the two channel-select bits (SEL0 and SEL1) for the 4:1 input multiplexer. |
| 49 | DAP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WQFN-48-EP(7x7) |
| Category | Interface |
| Pins | 49 |
CAD (KiCad official)
- Symbol:
LMH0376SQE - Footprint:
Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm - 3D model: WQFN-48-EP(7x7) (KiCad packages3D, STEP)
- 3D model files:
lmh0376sqe-etched.step/lmh0376sqe-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lmh0376sqe.step/lmh0376sqe.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (43 pp, sha256
dd5932d29bb5ff31, retrieved 2026-10-08, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).