component
LMC555DRG
Public Made by Adomby adom
HANSCHIP semiconductor Timers / Counters, SOP-8. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.
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LMC555DRG
HANSCHIP semiconductor · Timers / Counters · SOP-8
LMC555DRG from HANSCHIP semiconductor, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference; all voltages referenced to this pin. |
| 2 | TRIGGER | input | Active-low trigger input; sets output high when voltage falls below 1/3 VCC (VTRIG typ 0.31-0.36 VCC at VCC=5 V, 25 °C). |
| 3 | OUTPUT | output | Timer output; VOL max 0.4 V at IOL=3.2 mA (VCC=5 V, 25 °C), VOH min 4.0 V at IOH=−0.8 mA (VCC=5 V, 25 °C), IO absolute max 100 mA. |
| 4 | RESET | input | Active-low reset; forces output low and DISCHARGE on when pulled below VRST (0.4-1.0 V at VCC=2 V, 25 °C); tie high for normal operation. |
| 5 | CONTROL_VOLTAGE | input | Direct access to internal 2/3 VCC threshold reference; VCV typ 0.65-0.69 VCC at 25 °C; bypass to GND with 10 nF when unused. |
| 6 | THRESHOLD | input | Upper comparator input; resets output low when voltage exceeds 2/3 VCC (VTH typ 0.65-0.70 VCC at VCC=5 V, 25 °C). |
| 7 | DISCHARGE | output | Open-drain discharge switch; conducts (ON) when output is low to discharge the external timing capacitor; off when output is high. |
| 8 | VCC | power_in | Positive supply voltage; recommended operating range 2.0 to 18.0 V; ICC max 300 µA at VCC=18 V, 25 °C. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HANSCHIP semiconductor |
| Package | SOP-8 |
| Category | Clock/Timing |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
LMC555DRG - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
lmc555drg-etched.step/lmc555drg-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lmc555drg.step/lmc555drg.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HANSCHIP semiconductor datasheet (9 pp, sha256
73bdbbb1c0d6259e, retrieved 2026-09-29, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# LMC555DRG
**HANSCHIP semiconductor** · Timers / Counters · SOP-8
LMC555DRG from HANSCHIP semiconductor, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference; all voltages referenced to this pin. |
| 2 | TRIGGER | input | Active-low trigger input; sets output high when voltage falls below 1/3 VCC (VTRIG typ 0.31-0.36 VCC at VCC=5 V, 25 °C). |
| 3 | OUTPUT | output | Timer output; VOL max 0.4 V at IOL=3.2 mA (VCC=5 V, 25 °C), VOH min 4.0 V at IOH=−0.8 mA (VCC=5 V, 25 °C), IO absolute max 100 mA. |
| 4 | RESET | input | Active-low reset; forces output low and DISCHARGE on when pulled below VRST (0.4-1.0 V at VCC=2 V, 25 °C); tie high for normal operation. |
| 5 | CONTROL_VOLTAGE | input | Direct access to internal 2/3 VCC threshold reference; VCV typ 0.65-0.69 VCC at 25 °C; bypass to GND with 10 nF when unused. |
| 6 | THRESHOLD | input | Upper comparator input; resets output low when voltage exceeds 2/3 VCC (VTH typ 0.65-0.70 VCC at VCC=5 V, 25 °C). |
| 7 | DISCHARGE | output | Open-drain discharge switch; conducts (ON) when output is low to discharge the external timing capacitor; off when output is high. |
| 8 | VCC | power_in | Positive supply voltage; recommended operating range 2.0 to 18.0 V; ICC max 300 µA at VCC=18 V, 25 °C. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HANSCHIP semiconductor |
| Package | SOP-8 |
| Category | Clock/Timing |
| Pins | 8 |
## CAD (KiCad official)
- Symbol: `LMC555DRG`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `lmc555drg-etched.step` / `lmc555drg-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lmc555drg.step` / `lmc555drg.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [HANSCHIP semiconductor datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8600485005453897728) (9 pp, sha256 `73bdbbb1c0d6259e`, retrieved 2026-09-29, tier: lcsc)
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/lmc555drg-datasheet.pdf)