# LMBTA56LT1G

**LRC** · Bipolar (BJT) · SOT-23

LMBTA56LT1G from LRC, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BASE | passive | Base terminal of the PNP transistor; the datasheet gives no separate base limit, and the emitter-base rating is VEBO = -4.0 Vdc. |
| 2 | EMITTER | passive | Emitter terminal of the PNP transistor, with emitter-base breakdown VBR(EBO) of -4 V minimum at IE = -100 µA and an emitter-base rating of VEBO = -4.0 Vdc. |
| 3 | COLLECTOR | passive | Collector terminal of the PNP transistor, rated for VCEO = -80 Vdc, VCBO = -80 Vdc and continuous collector current IC = -500 mAdc. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | LRC |
| Package | SOT-23 |
| Category | Transistors/Thyristors |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Collector-Emitter Voltage | VCEO | -80 |  |  | Vdc |  | 1 |
| Collector-Base Voltage | VCBO | -80 |  |  | Vdc |  | 1 |
| Emitter-Base Voltage | VEBO | -4 |  |  | Vdc |  | 1 |
| Collector Current, Continuous | IC | -500 |  |  | mAdc |  | 1 |
| Junction and Storage Temperature Range | TJ, Tstg | -55 |  | 150 | °C |  | 1 |
| Total Power Dissipation FR-5 Board (Note 1) | PD |  |  | 225 | mW | @ Ta = 25°C, FR-5 board | 1 |
| Derate above 25°C (FR-5 Board) |  |  |  | 1.8 | °C/W | Above Ta = 25°C, FR-5 board | 1 |
| Thermal Resistance, Junction-to-Ambient (FR-5 Board) | RθJA |  |  | 556 | °C/W | FR-5 board | 1 |
| Total Power Dissipation Alumina Substrate (Note 2) | PD |  |  | 300 | mW | @ Ta = 25°C, alumina substrate | 1 |
| Derate above 25°C (Alumina Substrate) |  |  |  | 2.4 | °C/W | Above Ta = 25°C, alumina substrate | 1 |
| Thermal Resistance, Junction-to-Ambient (Alumina Substrate) | RθJA |  |  | 417 | °C/W | Alumina substrate | 1 |
| Collector-Emitter Breakdown Voltage | VBR(CEO) | -80 |  |  | V | IC = -1 mAdc, IB = 0 | 2 |
| Emitter-Base Breakdown Voltage | VBR(EBO) | -4 |  |  | V | IE = -100 μAdc, IC = 0 | 2 |
| Collector Cutoff Current (VCE) | ICES |  |  | -0.1 | μA | VCE = -60 Vdc, IE = 0 | 2 |
| Collector Cutoff Current (VCB) | ICBO |  |  | -0.1 | μA | VCB = -80 Vdc, IE = 0 | 2 |
| DC Current Gain | hFE | 100 |  |  |  | IC = -10 mAdc, VCE = -1 Vdc | 2 |
| Collector-Emitter Saturation Voltage | VCE(sat) |  |  | -0.25 | V | IC = -100 mAdc, IB = -10 mAdc | 2 |
| Base-Emitter On Voltage | VBE(on) |  |  | -1.2 | V | IC = -100 mAdc, VCE = -1 mAdc | 2 |
| Current-Gain, Bandwidth Product | fT | 50 |  |  | MHz | IC = -100 mAdc, VCE = -1 Vdc, f = 100 MHz | 2 |

## CAD (KiCad official)

- Symbol: `LMBTA56LT1G`
- Footprint: `Package_TO_SOT_SMD:SOT-23`
- 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files: `lmbta56lt1g-etched.step` / `lmbta56lt1g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lmbta56lt1g.step` / `lmbta56lt1g.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [LRC datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586181082030596096) (5 pp, sha256 `94212d74ae2eed8e`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/lmbta56lt1g-datasheet.pdf)