component
LMBT3906DW1T1G
Public Made by Adomby adom
LRC Bipolar (BJT), SOT-363. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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LMBT3906DW1T1G
LRC · Bipolar (BJT) · SOT-363
LMBT3906DW1T1G from LRC, in a SOT-363. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | E2 | passive | Emitter of transistor Q2 (PNP, VEBO -5.0 Vdc max). |
| 2 | B2 | passive | Base of transistor Q2; base-emitter saturation voltage -0.65 to -0.85 Vdc at IC -10 mAdc. |
| 3 | C1 | passive | Collector of transistor Q1 (VCEO -40 Vdc, IC -200 mAdc continuous max). |
| 4 | E1 | passive | Emitter of transistor Q1 (PNP, VEBO -5.0 Vdc max). |
| 5 | B1 | passive | Base of transistor Q1; base-emitter saturation voltage -0.65 to -0.85 Vdc at IC -10 mAdc. |
| 6 | C2 | passive | Collector of transistor Q2 (VCEO -40 Vdc, IC -200 mAdc continuous max). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | LRC |
| Package | SOT-363 |
| Category | Transistors/Thyristors |
| Pins | 6 |
CAD (KiCad official)
- Symbol:
LMBT3906DW1T1G - Footprint:
Package_TO_SOT_SMD:SOT-363_SC-70-6 - 3D model: SOT-363 (KiCad packages3D, STEP)
- 3D model files:
lmbt3906dw1t1g-etched.step/lmbt3906dw1t1g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lmbt3906dw1t1g.step/lmbt3906dw1t1g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: LRC datasheet (6 pp, sha256
d92abb6c4c40ca56, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# LMBT3906DW1T1G
**LRC** · Bipolar (BJT) · SOT-363
LMBT3906DW1T1G from LRC, in a SOT-363. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | E2 | passive | Emitter of transistor Q2 (PNP, VEBO -5.0 Vdc max). |
| 2 | B2 | passive | Base of transistor Q2; base-emitter saturation voltage -0.65 to -0.85 Vdc at IC -10 mAdc. |
| 3 | C1 | passive | Collector of transistor Q1 (VCEO -40 Vdc, IC -200 mAdc continuous max). |
| 4 | E1 | passive | Emitter of transistor Q1 (PNP, VEBO -5.0 Vdc max). |
| 5 | B1 | passive | Base of transistor Q1; base-emitter saturation voltage -0.65 to -0.85 Vdc at IC -10 mAdc. |
| 6 | C2 | passive | Collector of transistor Q2 (VCEO -40 Vdc, IC -200 mAdc continuous max). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | LRC |
| Package | SOT-363 |
| Category | Transistors/Thyristors |
| Pins | 6 |
## CAD (KiCad official)
- Symbol: `LMBT3906DW1T1G`
- Footprint: `Package_TO_SOT_SMD:SOT-363_SC-70-6`
- 3D model: SOT-363 (KiCad packages3D, STEP)
- 3D model files: `lmbt3906dw1t1g-etched.step` / `lmbt3906dw1t1g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lmbt3906dw1t1g.step` / `lmbt3906dw1t1g.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [LRC datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586173316084748288) (6 pp, sha256 `d92abb6c4c40ca56`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/lmbt3906dw1t1g-datasheet.pdf)