component
LM74900QRGERQ1
Public Made by Adomby adom
Texas Instruments Power Distribution Switches, VQFN-24(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownLM74900QRGERQ1
Texas Instruments · Power Distribution Switches · VQFN-24(4x4)
LM74900QRGERQ1 from Texas Instruments, in a VQFN-24(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DGATE | output | Ideal-diode MOSFET Q1 gate drive output; V(DGATE)-V(A) = 9.2-14 V for VS 5-65 V, peak source 18.5 mA, peak sink 2.6 A; connect to GATE of external N-channel MOSFET. |
| 2 | A | input | Ideal-diode anode; connects to SOURCE of external MOSFET Q1; forward drop regulated at 10.5 mV (typ), fast reverse-blocking threshold -10.5 mV (typ); withstands -60 V to 65 V. |
| 3 | SW | input | Battery sensing disconnect switch terminal; top node of OV/UVLO resistor ladder; internal switch resistance 10-46 Ω (3-65 V) disconnects ladder when EN or SLEEP is low to eliminate leakage. |
| 4 | UVLO | input | Adjustable undervoltage threshold input; resistor ladder from SW through UVLO to GND; rising threshold 0.585-0.630 V, falling 0.533-0.573 V; HGATE pulled low on undervoltage event; leakage 50-200 nA. |
| 5 | OV | input | Adjustable overvoltage threshold input; resistor ladder from SW through OV to GND; rising threshold 0.585-0.630 V, falling 0.533-0.573 V; HGATE pulled low on overvoltage event; leakage 50-200 nA. |
| 6 | EN | input | Enable input; logic high enables charge pump and gate drivers; falling below V(ENF) 0.41-0.98 V places device in shutdown at 2.5-5 µA; connect to VS for always-ON; withstands 0-65 V, leakage 55-200 nA. |
| 7 | SLEEP | input | Active-low SLEEP mode input; when low with EN high, disables charge pump and both gate drives, device draws 5.5-10 µA; internal bypass switch supports up to 100 mA peak to always-ON loads. |
| 8 | NC | unconnected | No internal connection; leave unconnected. |
| 9 | TMR | passive | Fault timer node; capacitor from TMR to GND sets circuit-breaker turn-off delay (CTMR charged at 65-97 µA source, discharged at 2-3.15 µA sink) and auto-retry period; leave open for fastest response or tie to GND to disable OCP. |
| 10 | IMON | output | Analog current monitor output; sources scaled replica of sense voltage per VIMON = (RIMON/0.9) × (VSENSE/RSET); accuracy ±12.5% at VSENSE = 20 mV; output range 0-5 V; leave floating if unused. |
| 11 | ILIM | input | Overcurrent threshold setting input; resistor RILIM from ILIM to GND programs OCP comparator (V(SNS_TH) rising 1.08-1.32 V); connect to GND to disable overcurrent protection. |
| 12 | FLT | output | Open-drain fault output; pulled low on UVLO, OV, OCP, or SCP events; pull-down resistance 11-60 Ω; withstands 0-65 V; leakage -100 to +400 nA; requires external pull-up resistor. |
| 13 | GND | power_in | Ground reference; connect to system ground plane. |
| 14 | HGATE | output | Load-disconnect MOSFET Q2 gate drive output; V(HGATE)-V(OUT) = 10-14.5 V for VS 5-65 V; source current 39-75 µA, sink current 128-180 mA during OV event; connect to GATE of external N-channel MOSFET. |
| 15 | OUT | input | Output rail sense input; connect to SOURCE of external MOSFET Q2; serves as reference for HGATE driver; absolute maximum OUT to VS = -65 V to +5 V. |
| 16 | SLEEP_OV | input | SLEEP-mode overvoltage protection pin; connect to VS (or C) for OV cut-off functionality or to OUT for OV clamp; default SLEEP-mode OV rising threshold 19.3-23 V; leave floating when SLEEP mode not used. |
| 17 | NC | unconnected | No internal connection; leave unconnected. |
| 18 | ISCP | input | Short-circuit protection threshold setting; leave floating to disable SCP; short to CS+ for 20 mV (typ) internal threshold; external series RISCP shifts threshold by 10.5 µA × RISCP + 20 mV; bias current 9.5-12 µA. |
| 19 | CS- | input | Current sense amplifier negative input; connect to negative terminal of external sense resistor RSNS; differential range CS+ to CS- limited to -0.3 V to +0.3 V absolute maximum. |
| 20 | CS+ | input | Current sense amplifier positive input; connect to positive terminal of external sense resistor RSNS; RSET (50-100 Ω) from CS+ to VS scales OCP threshold; differential range CS+ to CS- limited to -0.3 V to +0.3 V absolute maximum. |
| 21 | NC | unconnected | No internal connection; leave unconnected. |
| 22 | VS | power_in | IC power supply input; connect to common-drain midpoint of back-to-back MOSFET configuration; operating range 3-65 V; decouple with 100-nF capacitor to GND; quiescent current 630-750 µA (EN high, 12 V). |
| 23 | CAP | output | Charge pump capacitor output; connect 100-nF capacitor between CAP and VS; charge pump cycles V(CAP)-V(VS) between 12.2 V (enable) and 13.2 V (disable) typ; V(CAP)-V(A) absolute maximum 85 V. |
| 24 | C | input | Ideal-diode cathode; connect to DRAIN of external MOSFET Q1; V(A)-V(C) monitored to regulate forward drop at 10.5 mV and trigger fast turn-off below -10.5 mV; C to A absolute maximum 85 V. |
| 25 | RTN | unconnected | Exposed thermal pad (RTN); datasheet explicitly states leave floating and do not connect to GND plane; absolute maximum RTN to GND = -65 V to +0.3 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-24(4x4) |
| Category | Power Management (PMIC) |
| Pins | 25 |
CAD (KiCad official)
- Symbol:
LM74900QRGERQ1 - Footprint:
Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm - 3D model: VQFN-24(4x4) (KiCad packages3D, STEP)
- 3D model files:
lm74900qrgerq1-etched.step/lm74900qrgerq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lm74900qrgerq1.step/lm74900qrgerq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (48 pp, sha256
fc650de4293fb2b1, retrieved 2026-09-25, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).