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LM74202QPWPRQ1

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Texas Instruments Power Distribution Switches, HTSSOP-16. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.

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LM74202QPWPRQ1

Texas Instruments · Power Distribution Switches · HTSSOP-16

LM74202QPWPRQ1 from Texas Instruments, in a HTSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN power_in Input supply voltage. See IN, OUT, RTN and GND Pins section.
2 IN power_in Input supply voltage. See IN, OUT, RTN and GND Pins section.
3 UVLO input Input for setting the programmable Undervoltage Lockout threshold; an undervoltage event turns off the internal FET and asserts FLT to indicate power failure.
4 NC unconnected No internal connection. These pins can be connected to RTN for enhanced thermal performance.
5 OVP input Input for setting the programmable Overvoltage Protection threshold; an overvoltage event turns off the internal FET and asserts FLT to indicate the overvoltage fault.
6 MODE input Mode selection pin for overload fault response. See the Device Functional Modes section.
7 SHDN input Shutdown pin. Pulling SHDN low enters the device into low-power shutdown mode.
8 RTN power_in Reference for device internal control circuits. If reverse input polarity protection is not required, this pin can be connected to GND.
9 GND power_in Connect GND to system ground. See IN, OUT, RTN and GND Pins section.
10 IMON output Analog current monitor output. This pin sources a scaled down ratio of current through the internal FET.
11 ILIM bidirectional A resistor from this pin to RTN sets the overload and short-circuit current limit.
12 dVdT bidirectional A capacitor from this pin to RTN sets output voltage slew rate.
13 NC unconnected No internal connection. These pins can be connected to RTN for enhanced thermal performance.
14 FLT output Fault event indicator. Indicator is an open drain output.
15 OUT power_out Power output of the device. See IN, OUT, RTN and GND Pins section.
16 OUT power_out Power output of the device. See IN, OUT, RTN and GND Pins section.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package HTSSOP-16
Category Power Management (PMIC)
Pins 17

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Voltage on IN, IN-OUT -42 42 V All voltages referred to GND 4
Voltage on IN, IN-OUT (350 ms transient) -55 55 V 350ms transient, TA = 25°C 4
Voltage on IN, OUT, FLT, UVLO, SHDN to RTN -0.3 42 V 4
Voltage on OVP, dVdT, ILIM, IMON, MODE to RTN -0.3 5 V 4
Voltage on RTN -42 0.3 V 4
IFLT, IdVdT, ISHDN sink current IFLT, IdVdT, ISHDN 10 mA 4
Operating junction temperature TJ -40 150 °C 4
Transient junction temperature -65 °C 4
Storage temperature Tstg -65 150 °C 4
Input voltage range -40 40 V 4
Input voltage range, UVLO, OUT, FLT 0 40 V 4
Input voltage range, OVP, dVdT, ILIM, IMON, SHDN 0 4 V 4
ILIM resistance R(ILIM) 5.36 120 kΩ 4
External capacitance, IN, OUT 0.1 1 µF 4
Operating junction temperature range TJ -40 25 125 °C 4
Input operating voltage V(IN) 4.2 40 V 5
Internal POR threshold, rising VPORR 3.89 4 4.14 V 5
Internal POR hysteresis VPORHys 55 275 305 mV 5
Supply current with device enabled IQON 285 390 µA VIN = 12V; Enabled: V(SHDN) = 2 V 5
Supply current with device disabled IQOFF 16 32 µA VIN = 12V, V(SHDN) = 0 V 5
Reverse input supply current IVINR 50 µA V(IN) = -40 V, V(OUT) = 0 V 5
UVLO threshold voltage, rising V(UVLOR) 1.175 1.19 1.25 V 5
UVLO threshold voltage, falling V(UVLOR) 1.08 1.1 1.126 V 5
UVLO input leakage current I(UVLO) -100 100 nA 0 V ≤ V(UVLO) ≤ 40 V 5
SHDN output voltage V(SHDN) 2 2.7 3.4 V I(SHDN) = 0.1µA 5
SHDN threshold voltage for low IQ shutdown, falling V(SHUTF) 0.45 V 5
SHDN threshold voltage, rising V(SHUTFR) 0.96 V 5
SHDN input current I(SHDN) -10 µA V(SHDN) = 0.4 V 5
Factory set OV clamp select threshold V(SEL_OVP) 180 200 240 mV 5
Over-voltage threshold voltage, rising V(OVPR) 1.175 1.19 1.225 V 5
Over-voltage threshold voltage, falling V(OVPF) 1.085 1.125 V 5
OVP input leakage current I(OVP) -100 0 100 nA 0V ≤ V(OVP) ≤ 4V 5
dVdT charging current I(dVdT) 4 4.7 5.82 µA V(dVdT) = 0 V 5
dVdT discharging resistance R(dVdT) 28 Ω SHDN = 0 V, with I(dVdT) = 10mA sinking 5
dVdT to OUT gain GAIN(dVdT) 23.75 24.63 25.5 V/V 5
Overload current limit I(OL) 0.085 0.1 0.115 A R(ILIM) = 120 kΩ, V(IN)-V(OUT)=1V 5
Overload current limit I(OL) 0.95 1 1.05 A R(ILIM) = 12 kΩ, V(IN)-V(OUT)=1V 5
Overload current limit I(OL) 1.425 1.5 1.575 A R(ILIM) = 8 kΩ, V(IN)-V(OUT)=1V 5
Overload current limit I(OL) 2.11 2.23 2.35 A R(ILIM) = 5.36 kΩ, V(IN)-V(OUT)=1V 5
Circuit breaker detection threshold I(CB) 0.045 0.073 0.11 A R(ILIM) = 120 kΩ, MODE = open 5
Circuit breaker detection threshold I(CB) 2 2.21 2.4 A R(ILIM) = 5.36 kΩ, MODE = open 5
Short-circuit current limit I(SCL) 0.08 0.1 0.12 A R(ILIM) = 120 kΩ, V(IN)-V(OUT)=5V 5
Short-circuit current limit I(SCL) 1.425 1.5 1.575 A R(ILIM) = 8 kΩ, V(IN)-V(OUT)=5V 5
Short-circuit current limit I(SCL) 2.11 2.23 2.35 A R(ILIM) = 5.36 kΩ, V(IN)-V(OUT)=5V 5
Gain factor I(IMON):I(OUT) GAIN(IMON) 72 78.28 85 µA/A 0.1A ≤ I(OUT) ≤ 2A 6
IN to OUT total ON resistance RON 130 150 168 mΩ 0.1A ≤ I(OUT) ≤ 2A, TJ = 25°C 6
IN to OUT total ON resistance RON 150 220 mΩ 0.1A ≤ I(OUT) ≤ 2A, -40°C ≤ TJ ≤ 85°C 6
IN to OUT total ON resistance RON 78 150 265 mΩ 0.1A ≤ I(OUT) ≤ 2A, -40°C ≤ TJ ≤ 125°C 6
OUT leakage current in off state, sourcing Ilkg(OUT) 12 µA V(IN) = 40 V, V(SHDN)= 0 V, V(OUT) = 0 V, sourcing 6
OUT leakage current in off state, sinking Ilkg(OUT) -11 11 µA V(IN) = 0 V, V(SHDN)= 0 V, V(OUT) = 24 V, sinking 6
OUT leakage current in off state, sinking Ilkg(OUT) -40 -18 50 µA V(IN) = -40 V, V(SHDN)= 0 V, V(OUT) = 0 V, sinking 6
V(IN)-V(OUT) threshold for reverse protection comparator, falling V(REVTH) -16.2 -10 -5 mV 6
V(IN)-V(OUT) threshold for reverse protection comparator, rising V(FWDTH) 85 96 110 mV 6
FLT pull-down resistance R(FLT) 350 Ω V(OVP) = 2 V, I(FLT) = 5mA sinking 6
FLT input leakage current I(FLT) -200 200 nA 0 V ≤ V(FLT) ≤ 40 V 6
Junction-to-ambient thermal resistance RθJA 38.6 °C/W 4
Junction-to-case (top) thermal resistance RθJC(top) 22.7 °C/W 4
Junction-to-board thermal resistance RθJB 18.2 °C/W 4
Junction-to-case (bottom) thermal resistance RθJC(bot) 1.5 °C/W 4
Junction-to-top characterization parameter ΨJT 0.5 °C/W 4

CAD (KiCad official)

  • Symbol: LM74202QPWPRQ1
  • Footprint: Package_SO:TSSOP-16-1EP_4.4x5mm_P0.65mm
  • 3D model: HTSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: lm74202qpwprq1-etched.step / lm74202qpwprq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lm74202qpwprq1.step / lm74202qpwprq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (38 pp, sha256 2498a7530056c7e3, retrieved 2026-10-21, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF