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LM5575Q0MH
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Texas Instruments DC-DC Converters, HTSSOP-16-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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LM5575Q0MH
Texas Instruments · DC-DC Converters · HTSSOP-16-EP
LM5575Q0MH from Texas Instruments, in a HTSSOP-16-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_out | Output of the internal bias regulator that tracks VIN up to 9V and regulates to 7V above that; requires a 0.1µF to 1µF ceramic decoupling capacitor and can be driven externally at 7.5V to 14V to reduce internal power dissipation. |
| 2 | SD | input | Shutdown or UVLO input: below 0.7V the regulator is in low-power shutdown, 0.7V to 1.225V is standby, and above 1.225V it operates normally, with an internal 5µA pull-up if left open and a 14V absolute maximum. |
| 3 | VIN | power_in | Input supply voltage with a rated operating range of 6V to 75V (absolute maximum 76V). |
| 4 | SYNC | bidirectional | Oscillator synchronization input or output; can be pulled low by an external open-drain clock (pulse width at least 15ns, and the external frequency must be higher than the RT-set free-running frequency) and can be tied to other devices, up to 5 total, to synchronize them. |
| 5 | COMP | output | Output of the internal error amplifier; the loop compensation network must be connected between this pin and FB. |
| 6 | FB | input | Feedback input to the inverting input of the internal error amplifier, with a regulation threshold of 1.225V. |
| 7 | RT | input | Oscillator frequency-setting input; a single resistor connected between RT and AGND sets the switching frequency between 50kHz and 500kHz. |
| 8 | RAMP | output | Slope-compensation ramp signal; an external capacitor between RAMP and AGND sets the ramp slope, with a recommended range of 50pF to 2000pF. |
| 9 | AGND | power_in | Analog ground serving as the internal reference for the regulator control functions. |
| 10 | SS | output | Soft-start pin; an external capacitor with the internal 10µA current source sets the rise time of the error amplifier reference, and SS is held low during standby, VCC UVLO and thermal shutdown. |
| 11 | OUT | output | Output voltage connection, connected directly to the regulated output voltage. |
| 12 | PGND | power_in | Power ground serving as the low-side reference for the pre-driver and the IS sense resistor. |
| 13 | IS | input | Current-sense input connected to the recirculating diode anode; the internal sense resistor and sample-and-hold measure diode current at the end of the off-time. |
| 14 | SW | output | Switch node, the source terminal of the internal buck switch, which connects to the external Schottky diode and buck inductor; the absolute maximum SW-to-GND voltage in steady state is -1.5V. |
| 15 | PRE | output | Open-drain bootstrap-capacitor precharge output that can be connected to SW; an internal precharge MOSFET conducts for 250ns each cycle before the on-time to charge the bootstrap capacitor at very light load or during output precharge. |
| 16 | BST | input | Bootstrap input; an external capacitor is required between BST and SW, with TI recommending 0.022µF ceramic, and the capacitor is charged from VCC through an internal diode during the switch off-time. |
| 17 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HTSSOP-16-EP |
| Category | Power Management (PMIC) |
| Pins | 17 |
CAD (KiCad official)
- Symbol:
LM5575Q0MH - Footprint:
Package_SO:TSSOP-16-1EP_4.4x5mm_P0.65mm - 3D model: HTSSOP-16-EP (KiCad packages3D, STEP)
- 3D model files:
lm5575q0mh-etched.step/lm5575q0mh-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lm5575q0mh.step/lm5575q0mh.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (36 pp, sha256
00acb15b9610c6c8, retrieved 2026-10-07, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# LM5575Q0MH
**Texas Instruments** · DC-DC Converters · HTSSOP-16-EP
LM5575Q0MH from Texas Instruments, in a HTSSOP-16-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_out | Output of the internal bias regulator that tracks VIN up to 9V and regulates to 7V above that; requires a 0.1µF to 1µF ceramic decoupling capacitor and can be driven externally at 7.5V to 14V to reduce internal power dissipation. |
| 2 | SD | input | Shutdown or UVLO input: below 0.7V the regulator is in low-power shutdown, 0.7V to 1.225V is standby, and above 1.225V it operates normally, with an internal 5µA pull-up if left open and a 14V absolute maximum. |
| 3 | VIN | power_in | Input supply voltage with a rated operating range of 6V to 75V (absolute maximum 76V). |
| 4 | SYNC | bidirectional | Oscillator synchronization input or output; can be pulled low by an external open-drain clock (pulse width at least 15ns, and the external frequency must be higher than the RT-set free-running frequency) and can be tied to other devices, up to 5 total, to synchronize them. |
| 5 | COMP | output | Output of the internal error amplifier; the loop compensation network must be connected between this pin and FB. |
| 6 | FB | input | Feedback input to the inverting input of the internal error amplifier, with a regulation threshold of 1.225V. |
| 7 | RT | input | Oscillator frequency-setting input; a single resistor connected between RT and AGND sets the switching frequency between 50kHz and 500kHz. |
| 8 | RAMP | output | Slope-compensation ramp signal; an external capacitor between RAMP and AGND sets the ramp slope, with a recommended range of 50pF to 2000pF. |
| 9 | AGND | power_in | Analog ground serving as the internal reference for the regulator control functions. |
| 10 | SS | output | Soft-start pin; an external capacitor with the internal 10µA current source sets the rise time of the error amplifier reference, and SS is held low during standby, VCC UVLO and thermal shutdown. |
| 11 | OUT | output | Output voltage connection, connected directly to the regulated output voltage. |
| 12 | PGND | power_in | Power ground serving as the low-side reference for the pre-driver and the IS sense resistor. |
| 13 | IS | input | Current-sense input connected to the recirculating diode anode; the internal sense resistor and sample-and-hold measure diode current at the end of the off-time. |
| 14 | SW | output | Switch node, the source terminal of the internal buck switch, which connects to the external Schottky diode and buck inductor; the absolute maximum SW-to-GND voltage in steady state is -1.5V. |
| 15 | PRE | output | Open-drain bootstrap-capacitor precharge output that can be connected to SW; an internal precharge MOSFET conducts for 250ns each cycle before the on-time to charge the bootstrap capacitor at very light load or during output precharge. |
| 16 | BST | input | Bootstrap input; an external capacitor is required between BST and SW, with TI recommending 0.022µF ceramic, and the capacitor is charged from VCC through an internal diode during the switch off-time. |
| 17 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HTSSOP-16-EP |
| Category | Power Management (PMIC) |
| Pins | 17 |
## CAD (KiCad official)
- Symbol: `LM5575Q0MH`
- Footprint: `Package_SO:TSSOP-16-1EP_4.4x5mm_P0.65mm`
- 3D model: HTSSOP-16-EP (KiCad packages3D, STEP)
- 3D model files: `lm5575q0mh-etched.step` / `lm5575q0mh-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lm5575q0mh.step` / `lm5575q0mh.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/lm5575-q1) (36 pp, sha256 `00acb15b9610c6c8`, retrieved 2026-10-07, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/lm5575q0mh-datasheet.pdf)