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LM536025QPWPRQ1

Texas Instruments · DC-DC Converters · HTSSOP-16-EP

LM536025QPWPRQ1 from Texas Instruments, in a HTSSOP-16-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SW power_out Regulator switch node that connects to the power inductor; pins 1 and 2 must be connected directly together at the PCB.
2 SW power_out Regulator switch node that connects to the power inductor; pins 1 and 2 must be connected directly together at the PCB.
3 CBOOT power_in Bootstrap supply input for the gate drivers, connected through a high quality 470 nF capacitor to SW.
4 VCC power_out Internal 3.15 V regulator output supplying the internal control circuits; do not connect external loads, and a high quality 3.3 µF capacitor goes from this pin to GND.
5 BIAS power_in Input to the internal voltage regulator, connected to the output voltage point and never grounded, with a high quality 0.1 µF capacitor to GND.
6 SYNC input Synchronization input that locks the regulator switching frequency to the system clock (FSYNC range 1.9 MHz to 2.3 MHz); connect to GND when unused and do not float.
7 FPWM input Mode control input where High selects forced PWM and Low selects auto mode with automatic PFM/PWM transition; do not float.
8 RESET output Open drain reset output that must be pulled up to a suitable supply through a current limiting resistor; High indicates power OK and Low indicates fault, going low when EN is low.
9 FB input Feedback input connected to the output voltage sense point for fixed 5 V and 3.3 V options or to the feedback divider tap for the ADJ option; do not float or ground.
10 AGND power_in Analog ground for the regulator and system, to which all electrical parameters are measured, connected to EP and PGND on the PCB.
11 EN input Enable input where High turns the regulator ON and Low turns it OFF; it can be connected directly to VIN and must not float.
12 VIN power_in Input supply to the regulator, bypassed to PGND with high quality capacitor(s); pins 12 and 13 must be connected directly together at the PCB.
13 VIN power_in Input supply to the regulator, bypassed to PGND with high quality capacitor(s); pins 12 and 13 must be connected directly together at the PCB.
14 N/C unconnected This pin has no connection to the device.
15 PGND power_in Power ground for the internal low side MOSFET, connected to AGND and system ground; pins 15 and 16 must be connected directly together at the PCB.
16 PGND power_in Power ground for the internal low side MOSFET, connected to AGND and system ground; pins 15 and 16 must be connected directly together at the PCB.
17 EP power_in Exposed die attach paddle that must be connected to the ground plane for adequate heat sinking and noise reduction.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package HTSSOP-16-EP
Category Power Supply Chip
Pins 17

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VIN to AGND, PGND VIN -0.3 40 V 4
SW to AGND, PGND SW -0.3 V 4
CBOOT to SW CBOOT -0.3 3.6 V 4
EN to AGND, PGND EN -0.3 40 V 4
BIAS to AGND, PGND BIAS -0.3 16 V 4
FB to AGND, PGND (fixed 5 V and 3.3 V) FB -0.3 16 V fixed 5 V and 3.3 V 4
RESET to AGND, PGND RESET -0.3 8 V 4
SYNC, FPWM to AGND, PGND SYNC, FPWM -0.3 5.5 V 4
VCC to AGND, PGND VCC -0.3 4.2 V 4
RESET pin current IRESET -0.1 1.2 mA 4
AGND to PGND AGND-PGND -0.3 0.3 V 4
Storage temperature Tstg -40 150 °C 4
Input voltage VIN 3.9 36 V 5
Output voltage: fixed 5 V VOUT 0 5 V 5
Output current for LM53602-Q1 IOUT 0 2 A LM53602-Q1 5
RESET pin current IRESET 0 1 mA 5
Operating junction temperature TJ -40 150 °C 5
Initial reference voltage accuracy for 5 V and 3.3 V options VFB -1 1 % VIN = 3.8 V to 36 V, FPWM, TJ = 25°C 6
Initial reference voltage accuracy for 5 V and 3.3 V options VFB -1.25 1.25 % VIN = 3.8 V to 36 V, FPWM 6
Minimum input voltage to operate (rising) VIN-operate 3.2 3.95 V Rising 6
Minimum input voltage to operate (falling) VIN-operate 2.9 3.55 V Falling 6
Hysteresis, below VIN-operate 0.34 V 6
Operating quiescent current IQ 8 13 µA VBIAS = 5 V, TJ = -40°C to 125°C 6
Current into the BIAS pin IB 47 78 µA VBIAS = 5 V, FPWM = 3.3 V 6
RESET upper threshold voltage VRESET 105 107 110 % Rising, % of nominal Vout 6
RESET lower threshold voltage VRESET 92 94 96.5 % Falling, % of nominal Vout 6
RESET lower threshold voltage with respect to output voltage VRESET 94.5 95.7 % Falling, % actual Vout 6
Low level RESET pin output voltage VOL 0.4 V 50 µA pull-up to RESET pin, Vin = 1.5 V, EN = 0 V 6
Enable input threshold voltage VEN 1.7 2 V Rising 6
Enable input threshold voltage hysteresis VEN 0.45 0.55 V Hysteresis 6
Enable input threshold for full shutdown VEN-off 0.8 V EN input voltage required for complete shutdown of the regulator, falling 6
Logic input high level on FPWM and SYNC pins VIH 1.5 V 6
Logic input low level on FPWM and SYNC pins VIL 0.4 V 6
High side switch current limit IHS 2.4 4.4 A LM53602-Q1 6
Low side switch current limit ILS 2 2.4 2.8 A LM53602-Q1 7
High side MOSFET resistance (power switch on-resistance) Rdson 135 290 mΩ High side MOSFET resistance 7
Low side MOSFET resistance (power switch on-resistance) Rdson 60 125 mΩ Low side MOSFET resistance 7
Switching frequency FSW 1.85 2.1 2.35 MHz VIN = 3.8 V to 18 V 7
Synchronizing frequency range FSYNC 1.9 2.1 2.3 MHz 7
Thermal shutdown threshold TSD 162 178 °C Rising 7
Thermal shutdown hysteresis TSD 18 °C Hysteresis 7
Minimum switch on-time TON 50 80 ns VIN = 20 V 8
Minimum switch off-time TOFF 125 200 ns VIN = 3.8 V 8
Delay time to RESET high signal TRESET-act 2 3 4 ms 8
Glitch filter time for RESET function TRESET-filter 12 25 45 µs 8
Soft-start time TSS 1 2 3 ms 8
Turn-on delay TEN 0.7 0.8 ms CVCC = 1 µF, Tj = 25 °C 8
Junction-to-ambient thermal resistance RθJA 42.5 °C/W 5
Junction-to-case (top) thermal resistance RθJC(top) 22.6 °C/W 5
Junction-to-board thermal resistance RθJB 16.2 °C/W 5
Junction-to-top characterization parameter ψJT 0.6 °C/W 5
Junction-to-board characterization parameter ψJB 16 °C/W 5
Junction-to-case (bottom) thermal resistance RθJC(bot) 1.1 °C/W 5

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper 9. Keep switch area small. The copper area connecting the SW pin to the inductor should be kept as short 30

CAD (KiCad official)

  • Symbol: LM536025QPWPRQ1
  • Footprint: Package_SO:TSSOP-16-1EP_4.4x5mm_P0.65mm
  • 3D model: HTSSOP-16-EP (KiCad packages3D, STEP)
  • 3D model files: lm536025qpwprq1-etched.step / lm536025qpwprq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lm536025qpwprq1.step / lm536025qpwprq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (42 pp, sha256 30558a4547afecd5, retrieved 2026-11-05, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF