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LM53601LQDSXTQ1

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Texas Instruments DC-DC Converters, WSON-10-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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LM53601LQDSXTQ1

Texas Instruments · DC-DC Converters · WSON-10-EP(3x3)

LM53601LQDSXTQ1 from Texas Instruments, in a WSON-10-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SW power_out Regulator switch node that connects to the output inductor; SW to GND is rated -0.3 V to VIN+0.3 V.
2 BOOT input High-side gate driver upper supply rail; connect a 100-nF capacitor from SW to BOOT, charged by an internal diode while SW is low, and BOOT to SW is rated to 3.6 V maximum.
3 VCC power_out Internal 3-V regulator output that supplies the internal control circuits; connect a high-quality 1.0-µF capacitor from this pin to AGND for fixed versions.
4 FB power_in Fixed-version feedback for the output voltage and power source for the VCC regulator; connect to the output node with a 10-nF bypass capacitor placed immediately adjacent to the pin, and FB to GND is rated to 16 V for the 3.3 V and 5.0 V versions.
5 AGND power_in Fixed-version ground to which the input signals and FB are compared.
6 RESET output Open-drain reset output that goes low on a regulator fault or when EN is low, requires a current-limiting pull-up resistor, and has a sink current rating of 8 mA maximum.
7 EN input Enable input where high turns the regulator on and low turns it off; it can be connected to VIN but must not float, with EN to GND rated to 42 V.
8 VIN power_in Input supply to the regulator with an input range of 3.8 V to 36 V after startup; connect input bypass capacitors directly between this pin and GND.
9 SYNC/MODE input Multifunction mode input tolerant of voltages up to VIN: a valid external clock forces PWM and synchronizes the switching, tying it high selects forced PWM at the internal clock, tying it low selects AUTO mode with diode emulation at light load, and it must not float.
10 GND power_in Power ground that should be bypassed to VIN immediately adjacent to this pin.
11 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WSON-10-EP(3x3)
Category Power Supply Chip
Pins 11

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VIN to GND VIN -0.3 42 V 42 V max for ≤100 ms at ≤1% duty cycle (footnote 1) 5
SW to GND -0.3 V Max printed as VIN+0.3; -2 V / VIN+2 V allowed for ≤200 ns at ≤0.01% duty (footnote 2) 5
BOOT to SW -0.3 3.6 V 5
EN to GND -0.3 42 V 42 V max for ≤100 ms at ≤1% duty cycle (footnote 1) 5
FB to GND (3.3 V and 5.0 V fixed versions) -0.3 16 V 5
RESET to GND -0.3 8 V 5
SYNC/MODE to GND -0.3 42 V 42 V max for ≤100 ms at ≤1% duty cycle (footnote 1) 5
VCC VCC -0.3 3.6 V 5
GND to AGND (fixed version only) -1 2 V Voltage durations ≤1 µs; maximum DC voltage ±0.3 V (footnote 4) 5
Storage temperature Tstg -40 150 °C 5
Input voltage range after startup 3.8 36 V After startup (3.55 V extended range possible, see 7.6) 5
Output voltage range, 5 V option 0 5.5 V 5 V option 5
Load current range, LM53601-Q1 0 1000 mA LM53601-Q1 5
Operating junction temperature -40 150 °C 5
Initial output voltage accuracy (VFB) VFB -1 1 % Vin = 3.8 V to 36 V, Tj = 25°C, open loop 6
Initial output voltage accuracy (VFB) VFB -1.5 1.5 % Vin = 3.8 V to 36 V, open loop 6
Bias current into FB pin (fixed versions) IB 46 80 µA Vin = 13.5 V, not switching, Vbias = 5 V, Mode = 0 V 6
Minimum input voltage to operate (rising) Vin_UVLO 3.2 3.6 3.75 V Rising 6
Minimum input voltage hysteresis Vin_UVLO_hyst 0.2 0.3 0.35 V Hysteresis 6
RESET upper threshold voltage Vreset_OV 105 106.5 110 % Rising, % of Vout 6
RESET lower threshold voltage Vreset_UV 92 94 97 % Falling, % of Vout 6
Switching frequency with spread spectrum Fsw 1.89 2.1 2.4 MHz VIN = 13.5 V, center frequency with spread spectrum, PWM operation 7
Sync frequency range FSYNC 1.9 2.1 2.3 MHz Output setting + 1 V < VIN < 18 V 7
Sync input duty cycle range DSYNC 25 75 % High state input < 5.5 V and > 2.3 V 7
SYNC/MODE input hysteresis VSYNC/MODE 0.185 1 V 7
Frequency span of spread spectrum operation FSSS -4 4 % Printed ±4% 7
High side switch current limit, LM53601-Q1 IL_HS 1.5 1.83 2.1 A LM53601-Q1, duty cycle approaches 0% 7
Low side switch current limit, LM53601-Q1 IL_LS 1 1.2 1.43 A LM53601-Q1 7
Enable threshold voltage, rising VEN 1.7 2 V Enable rising 7
Enable threshold hysteresis VEN_HYST 0.4 0.55 V 7
RESET output on-resistance (Rdson) RRESET 50 120 Ω 8
Thermal shutdown rising threshold TSD 151 167 185 °C 8
Thermal shutdown falling threshold TSDF 140 157 °C 8
Output voltage, 5-V option Vout_5V 4.9 5 5.1 V VIN = 5.8 V to 36 V, IOUT = maximum recommended load current 8
Output voltage, 5-V option (auto mode) Vout_5V 4.9 5.05 5.125 V VIN = 5.5 V to 36 V, IOUT = 100 µA to 100 mA, typical value in Auto Mode 8
Minimum switch on time ton 50 80.5 ns VIN = 18 V, IOUT = 500 mA 9
Minimum switch off time toff 90 125 ns IOUT = 500 mA 9
Delay time to RESET high signal treset_act 4 6 8 ms 9
Soft-start time tSS 1.3 3 4.5 ms Time from first SW node pulse to Vref at 90%, VIN ≥ 4.2 V 9
Junction-to-ambient thermal resistance RθJA 46.2 °C/W DSX (WSON) 10-pin package 6
Junction-to-case (top) thermal resistance RθJC 31.5 °C/W DSX (WSON) 10-pin package 6
Junction-to-board thermal resistance RθJB 20.9 °C/W DSX (WSON) 10-pin package 6
Junction-to-case (bottom) thermal resistance RθJC(bot) 4.1 °C/W DSX (WSON) 10-pin package 6
Operating quiescent current IQ 6.5 µA Vin = 13.5 V, not switching, Vbias = 5 V 6
Operating quiescent current, Tj = 85°C IQ 16 µA Vin = 13.5 V, not switching, Vbias = 5 V, Tj = 85°C 6
Shutdown quiescent current ISD 1.8 µA EN = 0, VIN = 13.5 V, Tj = 25°C 6
Low level RESET output voltage VOL 0.4 V 50 µA pull-up to RESET pin, Vin = 1.5 V, EN = 0 V, Tj = 25°C 6
Minimum input voltage for proper RESET function Vreset_valid 1.5 V 50 µA pull-up to RESET pin, EN = 0 V, Tj = 25°C 6
Switching frequency, 5-V fixed output at 36 V input Fsw 1.5 MHz VIN = 36 V, 5-V fixed output device 7
SYNC/MODE input high threshold VSYNC/MODE 1.5 V SYNC/MODE input high (MODE = FPWM) 7
SYNC/MODE input low threshold VSYNC/MODE 0.4 V SYNC/MODE input low (MODE = VAUTO with diode emulation) 7
Frequency span pattern frequency of spread spectrum FPSS 30 Hz 7
Zero-cross current limit IL_ZC -0.01 A MODE/SYNC = Low 7
Negative current limit, LM53601-Q1 IL_NEG -0.7 A MODE/SYNC = High 7
High side MOSFET on-resistance Rdson 220 mΩ High side MOSFET 7
Low side MOSFET on-resistance Rdson 200 mΩ Low side MOSFET 7
Internal VCC voltage (Vbias = 0 V) Vcc 3.05 V VIN = 13.5 V, Vbias = 0 V 7
Internal VCC input under-voltage lock-out Vcc_UVLO 2.7 V VCC rising 7
Input current to VIN node, 5 V output IQ_VIN 30 µA VIN = 13.5 V, VOUT = 5 V, IOUT = 0 A 8
Maximum switch duty cycle Dmax 76 % Fsw = 2.1 MHz 8

CAD (KiCad official)

  • Symbol: LM53601LQDSXTQ1
  • Footprint: Package_SON:VSON-10-1EP_3x3mm_P0.5mm_EP1.2x2mm
  • 3D model: WSON-10-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: lm53601lqdsxtq1-etched.step / lm53601lqdsxtq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lm53601lqdsxtq1.step / lm53601lqdsxtq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (51 pp, sha256 d174c97c59a34282, retrieved 2026-10-12, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF