component
LM5176RHFR
Public Made by Adomby adom
Texas Instruments DC-DC Controllers, QFN-28-EP(4x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
← Commit history
Publish 0.1.0
12 files changed
+9184
docs/hero.pngadded⋯ 1 unchanged line ⋯
docs/lm5176rhfr-datasheet.pdfadded⋯ 1 unchanged line ⋯
lm5176rhfr-hero.glbadded⋯ 1 unchanged line ⋯
lm5176rhfr-hero.overlay.jsonadded+713@@ -0,0 +1,713 @@+{+ "spec": "adom-hero 1.4",+ "mpn": "LM5176RHFR",+ "kind": "component + footprint reference art",+ "board_use": false,+ "plane_z_mm": -0.02,+ "units": "metre",+ "upAxis": "Z",+ "layers": {+ "pad_outlines": {+ "material": "Footprint pads - teal dashed outlines - 50 percent opacity",+ "rgba": [+ 0.0,+ 0.902,+ 0.863,+ 0.5+ ],+ "pads": 29,+ "span_mm": 8.55,+ "dash_mm": 0.2138,+ "gap_mm": 0.1282,+ "pad_stroke_mm": 0.0513+ },+ "silkscreen": {+ "material": "Silkscreen reference lines - 30 percent opacity",+ "rgba": [+ 0.92,+ 0.96,+ 1.0,+ 0.3+ ],+ "footprint_items": 9,+ "pin1": {+ "source": "footprint silkscreen",+ "pad": "1"+ }+ },+ "signal_names": {+ "material": "Signal names - 50 percent opacity",+ "rgba": [+ 0.92,+ 0.96,+ 1.0,+ 0.5+ ],+ "font": "DejaVu Sans Mono",+ "labels": 28,+ "sides": "top + mirrored underside (single-sided)",+ "fallback_to_pad_number": 0+ }+ },+ "align": {+ "ok": true,+ "centre_offset_mm": 0.0,+ "tolerance_mm": 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lm5176rhfr.glbadded⋯ 1 unchanged line ⋯
lm5176rhfr.kicad_modadded+553@@ -0,0 +1,553 @@+(footprint "QFN-28-1EP_4x5mm_P0.5mm_EP2.65x3.65mm"+ (version 20260206)+ (generator "kicad-footprint-generator")+ (layer "F.Cu")+ (descr "QFN, 28 Pin (http://www.analog.com/media/en/technical-documentation/data-sheets/3555fe.pdf#page=32)")+ (tags "QFN NoLead")+ (property "Reference" "REF**"+ (at 0 -3.83 0)+ (layer "F.SilkS")+ (effects+ (font+ (size 1 1)+ (thickness 0.15)+ )+ )+ )+ (property "Value" "QFN-28-1EP_4x5mm_P0.5mm_EP2.65x3.65mm"+ (at 0 3.83 0)+ (layer "F.Fab")+ (effects+ (font+ (size 1 1)+ (thickness 0.15)+ )+ )+ )+ (property "KiLib_Generator" "package/no_lead"+ (at 0 0 0)+ (layer "F.SilkS")+ (hide yes)+ (effects+ (font+ (size 1 1)+ (thickness 0.15)+ )+ )+ )+ (attr smd)+ (duplicate_pad_numbers_are_jumpers no)+ (fp_line+ (start -2.11 -2.61)+ (end -1.635 -2.61)+ (stroke+ (width 0.12)+ (type solid)+ )+ (layer "F.SilkS")+ )+ (fp_line+ (start -2.11 -2.135)+ (end -2.11 -2.61)+ (stroke+ (width 0.12)+ (type solid)+ )+ (layer "F.SilkS")+ )+ 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pad="2"/>+ <connect gate="G$1" pin="RT/SYNC" pad="3"/>+ <connect gate="G$1" pin="SLOPE" pad="4"/>+ <connect gate="G$1" pin="SS" pad="5"/>+ <connect gate="G$1" pin="COMP" pad="6"/>+ <connect gate="G$1" pin="AGND" pad="7"/>+ <connect gate="G$1" pin="FB" pad="8"/>+ <connect gate="G$1" pin="VOSNS" pad="9"/>+ <connect gate="G$1" pin="ISNS_-" pad="10"/>+ <connect gate="G$1" pin="ISNS_+" pad="11"/>+ <connect gate="G$1" pin="CSG" pad="12"/>+ <connect gate="G$1" pin="CS" pad="13"/>+ <connect gate="G$1" pin="PGOOD" pad="14"/>+ <connect gate="G$1" pin="SW2" pad="15"/>+ <connect gate="G$1" pin="EP" pad="29"/>+ <connect gate="G$1" pin="VISNS" pad="28"/>+ <connect gate="G$1" pin="VIN" pad="27"/>+ <connect gate="G$1" pin="EN/UVLO" pad="26"/>+ <connect gate="G$1" pin="SW1" pad="25"/>+ <connect gate="G$1" pin="HDRV1" pad="24"/>+ <connect gate="G$1" pin="BOOT1" pad="23"/>+ <connect gate="G$1" pin="LDRV1" pad="22"/>+ <connect gate="G$1" pin="BIAS" pad="21"/>+ <connect gate="G$1" pin="VCC" pad="20"/>+ <connect gate="G$1" pin="PGND" pad="19"/>+ <connect gate="G$1" pin="LDRV2" pad="18"/>+ <connect gate="G$1" pin="BOOT2" pad="17"/>+ <connect gate="G$1" pin="HDRV2" pad="16"/>+ </connects>+ <technologies><technology name=""/></technologies>+ </device>+ </devices>+</deviceset>+</devicesets>+</library>+</drawing>+</eagle>
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package.jsonadded+281@@ -0,0 +1,281 @@+{+ "slug": "lm5176rhfr",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments DC-DC Controllers, QFN-28-EP(4x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power supply chip",+ "lm5176rhfr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "lm5176rhfr.kicad_sym",+ "lm5176rhfr.kicad_mod",+ "lm5176rhfr.glb",+ "lm5176rhfr.step",+ "lm5176rhfr.lbr",+ "docs/hero.png",+ "docs/lm5176rhfr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "lm5176rhfr-hero.glb",+ "lm5176rhfr-hero.overlay.json"+ ],+ "component": {+ "mpn": "LM5176RHFR",+ "manufacturer": "Texas Instruments",+ "package": "QFN-28-EP(4x5)",+ "pin_count": 29,+ "category": "Power Supply Chip",+ "subcategory": "DC-DC Controllers",+ "datasheet": "https://www.ti.com/cn/lit/gpn/lm5176",+ "parts": {+ "symbol": "lm5176rhfr.kicad_sym",+ "footprint": "lm5176rhfr.kicad_mod",+ "model_3d": "lm5176rhfr-hero.glb",+ "model_3d_plain": "lm5176rhfr.glb",+ "model_3d_step": "lm5176rhfr-etched.step",+ "model_3d_step_plain": "lm5176rhfr.step",+ "lbr": "lm5176rhfr.lbr"+ },+ "distributor_links": {+ "lcsc": 1850330,+ "digikey": "296-LM5176RHFRTR-ND",+ "mouser": "595-LM5176RHFR"+ },+ "distributor_check": {+ "checked_at": "2026-10-05T19:53:06Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-LM5176RHFRTR-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-LM5176RHFR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "MODE",+ "type": "input",+ "description": "Current limit hiccup mode selection; 93.1 kΩ to AGND enables hiccup, 200 kΩ or VCC connection disables hiccup."+ },+ {+ "number": "2",+ "name": "DITH",+ "type": "input",+ "description": "Frequency dithering enable; external capacitor to AGND modulates oscillator frequency by ±10% for EMI reduction."+ },+ {+ "number": "3",+ "name": "RT/SYNC",+ "type": "input",+ "description": "Switching frequency programming pin; external resistor to AGND sets frequency (100-600 kHz) or accepts external clock signal."+ },+ {+ "number": "4",+ "name": "SLOPE",+ "type": "input",+ "description": "Slope compensation ramp capacitor connection to AGND; provides ramp for stable current mode operation in buck and boost modes."+ },+ {+ "number": "5",+ "name": "SS",+ "type": "input",+ "description": "Soft-start capacitor connection to AGND; capacitor programs soft-start time for gradual VCC and output regulation."+ },+ {+ "number": "6",+ "name": "COMP",+ "type": "output",+ "description": "Error amplifier output (0.3 V to 3.0 V range); connect RC compensation network to AGND for feedback loop stability."+ },+ {+ "number": "7",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground of the IC; reference for all analog circuitry and also accepts PowerPAD solder connection for improved dissipation."+ },+ {+ "number": "8",+ "name": "FB",+ "type": "input",+ "description": "Feedback pin for output voltage regulation; connect resistor divider from converter output (0.8 V VREF nominal)."+ },+ {+ "number": "9",+ "name": "VOSNS",+ "type": "input",+ "description": "Output voltage sense input; monitors power stage output voltage over 0.8-55 V range."+ },+ {+ "number": "10",+ "name": "ISNS(-)",+ "type": "input",+ "description": "Current sense amplifier negative input; current sense resistor can locate on input or output side of converter."+ },+ {+ "number": "11",+ "name": "ISNS(+)",+ "type": "input",+ "description": "Current sense amplifier positive input; when voltage reaches 50 mV, slow constant current control loop activates for regulation."+ },+ {+ "number": "12",+ "name": "CSG",+ "type": "input",+ "description": "PWM current sense amplifier ground reference; connect directly to low-side of current sense resistor."+ },+ {+ "number": "13",+ "name": "CS",+ "type": "input",+ "description": "Positive input to PWM current sense amplifier; implements cycle-by-cycle current limiting."+ },+ {+ "number": "14",+ "name": "PGOOD",+ "type": "output",+ "description": "Power-good open-drain output (typical 4.2 mA sink); pulled low when FB voltage deviates outside ±9%/+10% of 0.8 V nominal."+ },+ {+ "number": "15",+ "name": "SW2",+ "type": "input",+ "description": "Boost side switching node; external bootstrap capacitor (0.1-0.22 µF ceramic) connects between SW2 and BOOT2."+ },+ {+ "number": "16",+ "name": "HDRV2",+ "type": "output",+ "description": "High-side gate driver output for boost switch; capable of sourcing 1.8 A and sinking 2.2 A peak current to MOSFET gate."+ },+ {+ "number": "17",+ "name": "BOOT2",+ "type": "power_out",+ "description": "Bootstrap power supply connection; external capacitor (0.1-0.22 µF ceramic) required between BOOT2 and SW2 to power HDRV2."+ },+ {+ "number": "18",+ "name": "LDRV2",+ "type": "output",+ "description": "Low-side gate driver output for boost switch; capable of sourcing 1.8 A and sinking 2.2 A peak current from VCC."+ },+ {+ "number": "19",+ "name": "PGND",+ "type": "power_in",+ "description": "Power ground of the IC; provides high current ground connection for low-side gate drivers."+ },+ {+ "number": "20",+ "name": "VCC",+ "type": "power_out",+ "description": "Internal bias regulator output; connect 0.1 µF capacitor to PGND or accept external 8-36 V supply via BIAS pin when VBIAS > 8 V."+ },+ {+ "number": "21",+ "name": "BIAS",+ "type": "power_in",+ "description": "Optional external bias supply input (8-36 V); reduces IC power loss at high VIN when VBIAS exceeds 8 V threshold."+ },+ {+ "number": "22",+ "name": "LDRV1",+ "type": "output",+ "description": "Low-side gate driver output for buck switch; capable of sourcing 1.8 A and sinking 2.2 A peak current from VCC."+ },+ {+ "number": "23",+ "name": "BOOT1",+ "type": "power_out",+ "description": "Bootstrap power supply connection; external capacitor (0.1-0.22 µF ceramic) required between BOOT1 and SW1 to power HDRV1."+ },+ {+ "number": "24",+ "name": "HDRV1",+ "type": "output",+ "description": "High-side gate driver output for buck switch; capable of sourcing 1.8 A and sinking 2.2 A peak current to MOSFET gate."+ },+ {+ "number": "25",+ "name": "SW1",+ "type": "input",+ "description": "Buck side switching node; external bootstrap capacitor (0.1-0.22 µF ceramic) connects between SW1 and BOOT1."+ },+ {+ "number": "26",+ "name": "EN/UVLO",+ "type": "input",+ "description": "Enable and under-voltage lockout input; below 0.4 V enters shutdown, above 1.22 V enables PWM if VCC exceeds UV threshold."+ },+ {+ "number": "27",+ "name": "VIN",+ "type": "power_in",+ "description": "Input supply voltage pin; accepts 4.2-55 V nominal (maximum 60 V transient); 2.5-55 V with external BIAS ≥ 5 V."+ },+ {+ "number": "28",+ "name": "VISNS",+ "type": "input",+ "description": "Input voltage sense pin; monitors power stage input rail voltage, valid 2.5-55 V range with VBIAS ≥ 5 V or VIN ≥ 4.5 V."+ },+ {+ "number": "29",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: SW1 and SW2 marked as input (I) in datasheet table, but functionally represent switching node output; PGOOD described as open-drain output; in strict KiCad ERC, open-drain should be tri_state rather tha; PowerPAD (exposed pad) should be soldered to AGND but is not assigned a pin number 1-28; requires se",+ "exposed pad 29 added from the footprint"+ ],+ "pages_sent": 12,+ "cost_usd": 0.2097,+ "at": "2026-10-05T19:52:50"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/lm5176",+ "pages": 46,+ "sha256": "4ce39346e67c6561",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 29,+ "described": 29,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ }+}
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