component
LM5164QDDARQ1
Public Made by Adomby adom
Texas Instruments DC-DC Converters, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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| lm5164qddarq1-etched.step | 28d ago |
| lm5164qddarq1-hero.glb | 28d ago |
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LM5164QDDARQ1
Texas Instruments · DC-DC Converters · SO-8
LM5164QDDARQ1 from Texas Instruments, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Internal circuit ground connection; it must connect to the exposed pad and the local ground plane, with the input and output capacitor returns tied to it. |
| 2 | VIN | power_in | Regulator supply input for the high-side MOSFET and internal bias regulator, rated 6 V to 100 V in recommended operation with an absolute maximum of 100 V to GND, and should be connected by a short low-impedance path to the input supply. |
| 3 | EN/UVLO | input | Precision enable and undervoltage lockout programming pin, where below 1.1 V the converter is in shutdown, 1.1 V to 1.5 V gives standby with no switching, and above 1.5 V starts the startup sequence; absolute maximum is 100 V to GND. |
| 4 | RON | input | On-time programming pin, where a resistor between this pin and GND sets the buck switch on-time; absolute maximum is 5.5 V to GND. |
| 5 | FB | input | Feedback input to the voltage regulation comparator, which regulates FB to the internal 1.2 V reference, with an absolute maximum of 5.5 V to GND. |
| 6 | PGOOD | output | Open-drain power-good output that must be pulled up through an external 10 kΩ to 100 kΩ resistor to a source not exceeding 14 V. |
| 7 | BST | power_in | Bootstrap gate-drive supply that requires a quality 2.2 nF, 50 V X7R ceramic capacitor between BST and SW; BST to SW absolute maximum is 5.5 V. |
| 8 | SW | power_out | Switch node connected internally to the source of the high-side NMOS switch and the drain of the low-side synchronous rectifier, which connects to the power inductor; SW to GND is rated -1.5 V to 100 V (-3 V for 20 ns transients). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SO-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
LM5164QDDARQ1 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files:
lm5164qddarq1-etched.step/lm5164qddarq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lm5164qddarq1.step/lm5164qddarq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (41 pp, sha256
29251f793479b02b, retrieved 2026-10-12, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).