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LM5156QDSSRQ1

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Texas Instruments Pre-ordered Chips, WSON-12-EP(2x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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LM5156QDSSRQ1

Texas Instruments · Pre-ordered Chips · WSON-12-EP(2x3)

LM5156QDSSRQ1 from Texas Instruments, in a WSON-12-EP(2x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BIAS power_in Supply voltage input to the VCC regulator, with a bypass capacitor from this pin to GND; the datasheet states BIAS can be connected to VCC for 2.97 V to 16 V operation and supports up to 60 V (65 V absolute maximum) for load dump.
2 VCC power_out Output of the internal VCC regulator and supply input of the MOSFET driver, requiring a ceramic bypass capacitor to GND; external VCC supply is supported to improve efficiency.
3 GATE output N-channel MOSFET gate drive output, to be connected directly to the MOSFET gate through a short, low-inductance path (1.5 A standard driver, -1 V 50 ns transient to GND).
4 GND power_in Ground pin, to be connected directly to the sense resistor ground through a low-inductance, wide and short path.
5 CS input Current sense input, connected to the positive side of the current sense resistor through a short path; CS to GND is limited to -0.3 V to 0.3 V DC (-1 V for 50 ns transient).
6 COMP output Output of the internal transconductance error amplifier, with loop compensation components connected between this pin and GND; the pin has an internal max voltage clamp that can handle up to 1.6 mA.
7 DITHOFF input Spread spectrum selection pin: internal spread spectrum is disabled when connected to VCC and enabled when connected to GND; absolute maximum rating is 18 V to GND.
8 FB input Inverting input of the error amplifier, connected to a voltage divider from the output to set output voltage in boost/SEPIC topologies; absolute maximum rating is -0.3 V to 4.0 V to GND.
9 SS input Soft-start time programming pin, with an external capacitor to GND that sets the error amplifier reference ramp rate together with an internal current source; not specified for an external applied voltage (-0.3 V to 3.8 V to GND).
10 RT input Switching frequency setting pin, programmed by a single resistor between RT and GND from 100 kHz to 2.2 MHz; not specified for an external applied voltage (-0.3 V to 3.8 V to GND).
11 PGOOD output Power-good indicator, an open-drain output that goes low if FB is below the undervoltage threshold and requires a pullup resistor to the system rail; absolute maximum rating is 18 V to GND and sink current is limited to 1 mA when VPGOOD exceeds VBIAS.
12 UVLO/SYNC/EN input Undervoltage lockout programming pin set by a resistor divider from supply, which can also accept a negative pulse for external clock synchronization; it must not be left floating and should be connected to BIAS if unused (absolute maximum -0.3 V to VBIAS+0.3 V).
13 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WSON-12-EP(2x3)
Category Interface ICs
Pins 13

CAD (KiCad official)

  • Symbol: LM5156QDSSRQ1
  • Footprint: Package_SON:WSON-12-1EP_3x2mm_P0.5mm_EP1x2.65
  • 3D model: WSON-12-EP(2x3) (KiCad packages3D, STEP)
  • 3D model files: lm5156qdssrq1-etched.step / lm5156qdssrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lm5156qdssrq1.step / lm5156qdssrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (50 pp, sha256 caf68a83227c4e7e, retrieved 2026-10-28, tier: manufacturer)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF