component
LM5156HPWPR
Public Made by Adomby adom
Texas Instruments DC-DC Converters, HTSSOP-14-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownLM5156HPWPR
Texas Instruments · DC-DC Converters · HTSSOP-14-EP
LM5156HPWPR from Texas Instruments, in a HTSSOP-14-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BIAS | power_in | Supply voltage input to VCC regulator operating from 2.97 V to 60 V with absolute maximum 65 V. |
| 2 | NC | unconnected | No electrical connection. |
| 3 | VCC | power_out | VCC regulator output and MOSFET driver supply voltage regulated to 6.85 V typical from ≥8 V BIAS input. |
| 4 | GATE | output | N-channel MOSFET gate drive output with ±1.5 A peak sourcing and sinking current capability. |
| 5 | PGND | power_in | Power ground connection for sense resistor return path requiring low inductance wide and short path. |
| 6 | AGND | power_in | Analog ground connection to be connected directly to analog ground plane through wide and short path. |
| 7 | CS | input | Current sense input with peak current limit threshold of 100 mV ±7% for cycle-by-cycle limiting. |
| 8 | COMP | output | Transconductance error amplifier output with 2 mA/V gain and internal voltage clamps from 1.15 V to 2.8 V. |
| 9 | DITHOFF | input | Spread spectrum selection pin with internal dithering enabled when grounded and disabled when connected to VCC. |
| 10 | FB | input | Inverting input of error amplifier with 1.0 V ±1% internal reference and absolute maximum voltage rating 4.0 V. |
| 11 | SS | input | Soft-start capacitor programming pin charged with 10 μA internal current source to ramp reference voltage. |
| 12 | RT | input | Switching frequency setting pin with external resistor programming frequency from 100 kHz to 2.2 MHz. |
| 13 | PGOOD | tri_state | Open-drain power good indicator output pulled low when FB voltage falls below 90% ±3% of internal reference. |
| 14 | EN/UVLO/SYNC | input | Undervoltage lockout and external clock synchronization input with enable threshold 0.52 V and UVLO threshold 1.5 V. |
| 15 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HTSSOP-14-EP |
| Category | Power Management (PMIC) |
| Pins | 15 |
CAD (KiCad official)
- Symbol:
LM5156HPWPR - Footprint:
Package_SO:TSSOP-14-1EP_4.4x5mm_P0.65mm - 3D model: HTSSOP-14-EP (KiCad packages3D, STEP)
- 3D model files:
lm5156hpwpr-etched.step/lm5156hpwpr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lm5156hpwpr.step/lm5156hpwpr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (47 pp, sha256
1c2afe6d19f818b2, retrieved 2026-09-27, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).