component
LM5155QDSSTQ1
Public Made by Adomby adom
Texas Instruments DC-DC Controllers, WSON-12-EP(2x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"description": "Texas Instruments DC-DC Controllers, WSON-12-EP(2x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
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"component": {
"mpn": "LM5155QDSSTQ1",
"manufacturer": "Texas Instruments",
"package": "WSON-12-EP(2x3)",
"pin_count": 13,
"category": "Power Supply Chip",
"subcategory": "DC-DC Controllers",
"datasheet": "https://www.ti.com/cn/lit/gpn/lm5155-q1",
"parts": {
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"lbr": "lm5155qdsstq1.lbr"
},
"distributor_links": {
"lcsc": "C2658064",
"digikey": "296-LM5155QDSSTQ1TR-ND",
"mouser": "595-LM5155QDSSTQ1"
},
"distributor_check": {
"checked_at": "2026-10-08T00:56:48Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "296-LM5155QDSSTQ1TR-ND",
"status": "found",
"lifecycle": "Active"
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"pn": "595-LM5155QDSSTQ1",
"status": "found"
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},
"pins": [
{
"number": "1",
"name": "BIAS",
"type": "power_in",
"description": "Supply input for the internal VCC regulator; connect a bypass capacitor between this pin and PGND, with BIAS rated 3.5V to 45V (2.97V to 16V when tied to VCC) and 50V absolute maximum."
},
{
"number": "2",
"name": "VCC",
"type": "power_out",
"description": "Output of the internal VCC regulator and supply input for the MOSFET driver; connect a ceramic bypass capacitor between this pin and PGND, with a recommended value of 1µF to 4.7µF and VCC regulation of 6.85V typical."
},
{
"number": "3",
"name": "GATE",
"type": "output",
"description": "Gate drive output for the N-channel MOSFET, connected through a short, low-inductance path directly to the MOSFET gate, capable of sinking or sourcing 1.5A peak."
},
{
"number": "4",
"name": "PGND",
"type": "power_in",
"description": "Power ground, connected through a wide, short, low-inductance path directly to the ground connection of the current sense resistor."
},
{
"number": "5",
"name": "CS",
"type": "input",
"description": "Current sense input, connected through a short path to the positive side of the current sense resistor, with a 100mV (±7%) current limit threshold referenced to PGND."
},
{
"number": "6",
"name": "COMP",
"type": "output",
"description": "Output of the internal transconductance error amplifier; connect the loop compensation network between this pin and PGND, with the COMP pin voltage clamped internally."
},
{
"number": "7",
"name": "AGND",
"type": "power_in",
"description": "Analog ground, connected through a wide, short path to the analog ground plane; the exposed pad must be tied to AGND."
},
{
"number": "8",
"name": "FB",
"type": "input",
"description": "Inverting input of the error amplifier, fed from the output resistor divider with a 1V reference and a 3.8V absolute maximum rating; the low-side feedback resistor connects to AGND."
},
{
"number": "9",
"name": "SS",
"type": "input",
"description": "Soft-start timing pin; an external capacitor to AGND and the internal 10µA current source set the ramp rate of the internal error amplifier reference, with a 3.8V absolute maximum rating."
},
{
"number": "10",
"name": "RT",
"type": "input",
"description": "Switching frequency set pin; a single resistor between RT and AGND programs the switching frequency from 100kHz to 2.2MHz, with the RT regulator holding this pin at 0.5V when enabled."
},
{
"number": "11",
"name": "PGOOD",
"type": "output",
"description": "Open-drain power-good indicator that goes low when FB is below the undervoltage threshold; connect a pull-up resistor to the system rail (minimum 10kΩ recommended) and do not exceed VBIAS + 0.3V."
},
{
"number": "12",
"name": "UVLO/EN/SYNC",
"type": "input",
"description": "Line undervoltage lockout programming pin set by a resistor divider from the supply, which also accepts negative pulses for clock synchronization; it must not be left floating and should be connected to BIAS when unused."
},
{
"number": "13",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The exposed pad is labeled 'EP' in the pin figure and table with no numeric pin number, so it is lis; The datasheet pin table gives types P, O, G, I (and P for VCC). These were mapped to KiCad classes: ; The MPN LM5155QDSSTQ1 is the wettable-flank variant (DSS0012C, WF) according to the device compariso",
"exposed pad 13 added from the footprint",
"dropped thermal pad ['EP'] absent from footprint"
],
"pages_sent": 29,
"cost_usd": 0.1449,
"at": "2026-10-08T00:56:28"
},
"datasheet": {
"url": "https://www.ti.com/cn/lit/gpn/lm5155-q1",
"pages": 50,
"sha256": "a8503f9fa4bec785",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 13,
"described": 13,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
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}