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LM5140QRWGRQ1
Public Made by Adomby adom
Texas Instruments DC-DC Controllers, VQFN-40-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+78@@ -0,0 +1,78 @@+# LM5140QRWGRQ1++**Texas Instruments** · DC-DC Controllers · VQFN-40-EP(6x6)++LM5140QRWGRQ1 from Texas Instruments, in a VQFN-40-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | SS2 | input | Channel 2 soft-start programming pin; an external capacitor and internal 20-μA source set the error amplifier reference ramp, and pulling SS below 80 mV turns off the channel 2 gate driver outputs. |+| 2 | COMP2 | output | Output of the channel 2 transconductance error amplifier. |+| 3 | FB2 | input | Channel 2 feedback input with a 1.2 V regulation threshold; connect to VDD for a 5 V output or to ground for a fixed 8 V output, or use a resistive divider from VOUT2 to set 1.5 V to 15 V. |+| 4 | CS2 | input | Channel 2 current sense amplifier input, to be connected with a low-current Kelvin connection to the inductor side of the external current sense resistor. |+| 5 | VOUT2 | input | Channel 2 output voltage and current sense amplifier input, connected to the output side of the channel 2 current sense resistor. |+| 6 | VCCX | input | Optional external bias supply input; when VCCX is above 4.5 V it is connected internally to VCC and the internal VCC regulator is disabled, and it should be grounded if unused. |+| 7 | PG2 | output | Open-collector power-good output that goes low when VOUT2 is outside its specified regulation window. |+| 8 | HOL2 | output | Channel 2 high-side gate driver turn-off output. |+| 9 | HO2 | output | Channel 2 high-side gate driver turn-on output. |+| 10 | SW2 | input | Channel 2 buck switching node, connected to the bootstrap capacitor, the high-side MOSFET source and the low-side MOSFET drain. |+| 11 | HB2 | output | Channel 2 high-side driver supply for bootstrap gate drive. |+| 12 | LOL2 | output | Channel 2 low-side gate driver turn-off output. |+| 13 | LO2 | output | Channel 2 low-side gate driver turn-on output. |+| 14 | PGND2 | power_in | Power ground connection for the channel 2 low-side NMOS gate driver. |+| 15 | VCC | power_out | VCC bias supply pin; pin 15 and pin 16 must be connected together on the PCB. |+| 16 | VCC | power_out | VCC bias supply pin; pin 15 and pin 16 must be connected together on the PCB. |+| 17 | PGND1 | power_in | Power ground connection for the channel 1 low-side NMOS gate driver. |+| 18 | LO1 | output | Channel 1 low-side gate driver turn-on output. |+| 19 | LOL1 | output | Channel 1 low-side gate driver turn-off output. |+| 20 | HB1 | output | Channel 1 high-side driver supply for bootstrap gate drive. |+| 21 | SW1 | input | Channel 1 buck switching node, connected to the bootstrap capacitor, the high-side MOSFET source and the low-side MOSFET drain. |+| 22 | HO1 | output | Channel 1 high-side gate driver turn-on output. |+| 23 | HOL1 | output | Channel 1 high-side gate driver turn-off output. |+| 24 | PG1 | output | Open-collector power-good output that goes low when VOUT1 is outside its specified regulation window. |+| 25 | VIN | power_in | Supply voltage input source for the VCC regulators (absolute maximum 70 V on VIN per the Absolute Maximum Ratings). |+| 26 | VOUT1 | input | Channel 1 output voltage and current sense amplifier input, connected to the output side of the channel 1 current sense resistor. |+| 27 | CS1 | input | Channel 1 current sense amplifier input, to be connected with a low-current Kelvin connection to the inductor side of the external current sense resistor. |+| 28 | FB1 | input | Channel 1 feedback input with a 1.2 V regulation threshold; connect to VDDA for a 3.3 V output or to ground for a 5 V output, or use a resistive divider from VOUT1 to set 1.5 V to 15 V. |+| 29 | COMP1 | output | Output of the channel 1 transconductance error amplifier. |+| 30 | SS1 | input | Channel 1 soft-start programming pin; an external capacitor and internal 20 μA source set the error amplifier reference ramp, and pulling SS below 80 mV turns off the channel 1 gate driver outputs. |+| 31 | EN1 | input | Active-high logic input that enables channel 1. |+| 32 | RES | output | Restart timer pin; an external capacitor sets the hiccup-mode off time, and connecting RES to VDD during power-up disables hiccup protection. |+| 33 | DEMB | input | Diode emulation pin; grounding it enables diode emulation, and connecting it to VDDA operates the device in FPWM mode with continuous conduction at light loads. |+| 34 | ILSET | input | Current limit threshold pin; connecting to VDDA sets the current limit to 73 mV for both channels, and connecting to GND sets it to 48 mV. |+| 35 | AGND | power_in | Analog ground connection and return for the internal voltage reference and analog circuits. |+| 36 | VDDA | power_out | Internal analog bias regulator output; connect a capacitor from VDDA to AGND. |+| 37 | OSC | input | Frequency selection pin; connecting to VDDA selects the default 2.2 MHz oscillator frequency, and connecting to ground sets 440 kHz. |+| 38 | SYNIN | input | Sync input for synchronizing the internal oscillator to an external clock; connect to AGND if the synchronization feature is not used. |+| 39 | SYNOUT | output | TTL-level sync output signal that is 180° out of phase with the channel 1 HO1 gate drive. |+| 40 | EN2 | input | Active-high logic input that enables channel 2. |+| 41 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VQFN-40-EP(6x6) |+| Category | Power Supply Chip |+| Pins | 41 |++## CAD (KiCad official)++- Symbol: `LM5140QRWGRQ1`+- Footprint: `Package_DFN_QFN:QFN-40-1EP_6x6mm_P0.5mm_EP4.6x4.6mm`+- 3D model: VQFN-40-EP(6x6) (KiCad packages3D, STEP)+- 3D model files: `lm5140qrwgrq1-etched.step` / `lm5140qrwgrq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lm5140qrwgrq1.step` / `lm5140qrwgrq1.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/lm5140-q1) (48 pp, sha256 `0d277fa180b6852d`, retrieved 2026-10-08, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/lm5140qrwgrq1-datasheet.pdf)
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an external capacitor and internal 20-μA source set the error amplifier reference ramp, and pulling SS below 80 mV turns off the channel 2 gate driver outputs."+ },+ {+ "number": "2",+ "name": "COMP2",+ "type": "output",+ "description": "Output of the channel 2 transconductance error amplifier."+ },+ {+ "number": "3",+ "name": "FB2",+ "type": "input",+ "description": "Channel 2 feedback input with a 1.2 V regulation threshold; connect to VDD for a 5 V output or to ground for a fixed 8 V output, or use a resistive divider from VOUT2 to set 1.5 V to 15 V."+ },+ {+ "number": "4",+ "name": "CS2",+ "type": "input",+ "description": "Channel 2 current sense amplifier input, to be connected with a low-current Kelvin connection to the inductor side of the external current sense resistor."+ },+ {+ "number": "5",+ "name": "VOUT2",+ "type": "input",+ "description": "Channel 2 output voltage and current sense amplifier input, connected to the output side of the channel 2 current sense resistor."+ },+ {+ "number": "6",+ "name": "VCCX",+ "type": "input",+ "description": "Optional external bias supply input; when VCCX is above 4.5 V it is connected internally to VCC and the internal VCC regulator is disabled, and it should be grounded if unused."+ },+ {+ "number": "7",+ "name": "PG2",+ "type": "output",+ "description": "Open-collector power-good output that goes low when VOUT2 is outside its specified regulation window."+ },+ {+ "number": "8",+ "name": "HOL2",+ "type": "output",+ "description": "Channel 2 high-side gate driver turn-off output."+ },+ {+ "number": "9",+ "name": "HO2",+ "type": "output",+ "description": "Channel 2 high-side gate driver turn-on output."+ },+ {+ "number": "10",+ "name": "SW2",+ "type": "input",+ "description": "Channel 2 buck switching node, connected to the bootstrap capacitor, the high-side MOSFET source and the low-side MOSFET drain."+ },+ {+ "number": "11",+ "name": "HB2",+ "type": "output",+ "description": "Channel 2 high-side driver supply for bootstrap gate drive."+ },+ {+ "number": "12",+ "name": "LOL2",+ "type": "output",+ "description": "Channel 2 low-side gate driver turn-off output."+ },+ {+ "number": "13",+ "name": "LO2",+ "type": "output",+ "description": "Channel 2 low-side gate driver turn-on output."+ },+ {+ "number": "14",+ "name": "PGND2",+ "type": "power_in",+ "description": "Power ground connection for the channel 2 low-side NMOS gate driver."+ },+ {+ "number": "15",+ "name": "VCC",+ "type": "power_out",+ "description": "VCC bias supply pin; pin 15 and pin 16 must be connected together on the PCB."+ },+ {+ "number": "16",+ "name": "VCC",+ "type": "power_out",+ "description": "VCC bias supply pin; pin 15 and pin 16 must be connected together on the PCB."+ },+ {+ "number": "17",+ "name": "PGND1",+ "type": "power_in",+ "description": "Power ground connection for the channel 1 low-side NMOS gate driver."+ },+ {+ "number": "18",+ "name": "LO1",+ "type": "output",+ "description": "Channel 1 low-side gate driver turn-on output."+ },+ {+ "number": "19",+ "name": "LOL1",+ "type": "output",+ "description": "Channel 1 low-side gate driver turn-off output."+ },+ {+ "number": "20",+ "name": "HB1",+ "type": "output",+ "description": "Channel 1 high-side driver supply for bootstrap gate drive."+ },+ {+ "number": "21",+ "name": "SW1",+ "type": "input",+ "description": "Channel 1 buck switching node, connected to the bootstrap capacitor, the high-side MOSFET source and the low-side MOSFET drain."+ },+ {+ "number": "22",+ "name": "HO1",+ "type": "output",+ "description": "Channel 1 high-side gate driver turn-on output."+ },+ {+ "number": "23",+ "name": "HOL1",+ "type": "output",+ "description": "Channel 1 high-side gate driver turn-off output."+ },+ {+ "number": "24",+ "name": "PG1",+ "type": "output",+ "description": "Open-collector power-good output that goes low when VOUT1 is outside its specified regulation window."+ },+ {+ "number": "25",+ "name": "VIN",+ "type": "power_in",+ "description": "Supply voltage input source for the VCC regulators (absolute maximum 70 V on VIN per the Absolute Maximum Ratings)."+ },+ {+ "number": "26",+ "name": "VOUT1",+ "type": "input",+ "description": "Channel 1 output voltage and current sense amplifier input, connected to the output side of the channel 1 current sense resistor."+ },+ {+ "number": "27",+ "name": "CS1",+ "type": "input",+ "description": "Channel 1 current sense amplifier input, to be connected with a low-current Kelvin connection to the inductor side of the external current sense resistor."+ },+ {+ "number": "28",+ "name": "FB1",+ "type": "input",+ "description": "Channel 1 feedback input with a 1.2 V regulation threshold; connect to VDDA for a 3.3 V output or to ground for a 5 V output, or use a resistive divider from VOUT1 to set 1.5 V to 15 V."+ },+ {+ "number": "29",+ "name": "COMP1",+ "type": "output",+ "description": "Output of the channel 1 transconductance error amplifier."+ },+ {+ "number": "30",+ "name": "SS1",+ "type": "input",+ "description": "Channel 1 soft-start programming pin; an external capacitor and internal 20 μA source set the error amplifier reference ramp, and pulling SS below 80 mV turns off the channel 1 gate driver outputs."+ },+ {+ "number": "31",+ "name": "EN1",+ "type": "input",+ "description": "Active-high logic input that enables channel 1."+ },+ {+ "number": "32",+ "name": "RES",+ "type": "output",+ "description": "Restart timer pin; an external capacitor sets the hiccup-mode off time, and connecting RES to VDD during power-up disables hiccup protection."+ },+ {+ "number": "33",+ "name": "DEMB",+ "type": "input",+ "description": "Diode emulation pin; grounding it enables diode emulation, and connecting it to VDDA operates the device in FPWM mode with continuous conduction at light loads."+ },+ {+ "number": "34",+ "name": "ILSET",+ "type": "input",+ "description": "Current limit threshold pin; connecting to VDDA sets the current limit to 73 mV for both channels, and connecting to GND sets it to 48 mV."+ },+ {+ "number": "35",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground connection and return for the internal voltage reference and analog circuits."+ },+ {+ "number": "36",+ "name": "VDDA",+ "type": "power_out",+ "description": "Internal analog bias regulator output; connect a capacitor from VDDA to AGND."+ },+ {+ "number": "37",+ "name": "OSC",+ "type": "input",+ "description": "Frequency selection pin; connecting to VDDA selects the default 2.2 MHz oscillator frequency, and connecting to ground sets 440 kHz."+ },+ {+ "number": "38",+ "name": "SYNIN",+ "type": "input",+ "description": "Sync input for synchronizing the internal oscillator to an external clock; connect to AGND if the synchronization feature is not used."+ },+ {+ "number": "39",+ "name": "SYNOUT",+ "type": "output",+ "description": "TTL-level sync output signal that is 180° out of phase with the channel 1 HO1 gate drive."+ },+ {+ "number": "40",+ "name": "EN2",+ "type": "input",+ "description": "Active-high logic input that enables channel 2."+ },+ {+ "number": "41",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The datasheet's 'Exposed Pad on Bottom' (connect to AGND and PGND on the PCB) has no printed pin num; The SS1 description in the datasheet says 'Channel 2 soft-start programming pin', which appears to b; The datasheet lists SW1 and SW2 with type 'I' (input). They are mapped to KiCad 'input' as printed, ",+ "exposed pad 41 added from the footprint"+ ],+ "pages_sent": 8,+ "cost_usd": 0.0851,+ "at": "2026-10-08T14:43:22"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/lm5140-q1",+ "pages": 48,+ "sha256": "0d277fa180b6852d",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 41,+ "described": 41,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "lm5140qrwgrq1.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 6,+ 1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "e5b4286c2329085d9ef7f90d5eb5bf41a435241ecc1baaf1383823b6d6a946ae",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "lm5140qrwgrq1-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 6,+ 1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "bf5d81dcfa5f0d115c3d57f184d09652c87207e0b8e54a95c183bbae44b07f6b",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}