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LM5123QRGRRQ1
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Texas Instruments DC-DC Converters, VQFN-20(3.5x3.5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+58@@ -0,0 +1,58 @@+# LM5123QRGRRQ1++**Texas Instruments** · DC-DC Converters · VQFN-20(3.5x3.5)++LM5123QRGRRQ1 from Texas Instruments, in a VQFN-20(3.5x3.5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | CSP | input | Current sensing amplifier positive input pin. |+| 2 | CSN | input | Current sensing amplifier negative input pin. |+| 3 | VOUT/SENSE | input | Output voltage sensing pin; high-side MOSFET drain voltage sensing pin connected to drain via short low-impedance path. |+| 4 | PGOOD | output | Power good indicator with open-drain output stage; must be pulled to ground when output voltage is below threshold. |+| 5 | HO | output | High-side gate driver output connected to high-side N-channel MOSFET gate via short low-impedance path. |+| 6 | SW | passive | Switch node connection and high-side MOSFET source voltage sensing pin; connected to high-side MOSFET source and low-side MOSFET drain via short low-impedance path. |+| 7 | HB | passive | High-side driver power supply with internal bootstrap diode connected from VCC; connect 0.1μF capacitor between this pin and SW. |+| 8 | BIAS | power_in | Power supply input voltage for VCC regulator; accepts 3.8V to 42V; connect 1μF capacitor between pin and ground. |+| 9 | VCC | power_out | Internal VCC regulator output (5V nominal) and power supply for internal MOSFET drivers; connect 4.7μF capacitor between pin and PGND. |+| 10 | PGND | power_in | Power ground pin connected directly to low-side N-channel MOSFET source via short low-impedance path. |+| 11 | LO | output | Low-side gate driver output connected to low-side N-channel MOSFET gate via short low-impedance path. |+| 12 | MODE | input | Device switching mode selection pin for FPWM, diode emulation, and skip modes; open or >500kΩ to AGND selects skip mode, <0.4V selects DE mode, >2.0V selects FPWM mode. |+| 13 | UVLO/EN | input | Enable pin and line under-voltage lockout programming pin; device turns off below 0.35V and enables above 0.65V; connect voltage divider to supply voltage and ground. |+| 14 | SYNC/DITHER/VH/CP | bidirectional | Synchronization clock input, clock dither and spread spectrum modulation programming pin, VCC hold pin for fast restart, and charge pump enable pin for bypass operation. |+| 15 | RT | input | Switching frequency setting pin; connect single resistor between pin and AGND to program frequency from 100kHz to 2.2MHz without external clock on SYNC pin. |+| 16 | VREF/RANGE | power_in | 1.0V internal reference voltage output and VOUT range selection pin; connect 470pF capacitor to AGND; output voltage range selected by resistor divider during configuration (75-100kΩ for 5-20V, 20-35kΩ for 15-57V). |+| 17 | SS | bidirectional | Soft start time programming pin; external capacitor and internal 20μA current source set soft start ramp rate of error amplifier reference during startup. |+| 18 | TRK | input | Output regulation target programming pin; VOUT regulated voltage programmed by voltage divider to VREF or direct D/A control; recommended operating voltage 0.25V to 1.0V. |+| 19 | AGND | power_in | Analog ground pin connected to analog ground plane via wide short path. |+| 20 | COMP | output | Transconductive error amplifier output; connect loop compensation network between pin and AGND. |+| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VQFN-20(3.5x3.5) |+| Category | Power Management (PMIC) |+| Pins | 21 |++## CAD (KiCad official)++- Symbol: `LM5123QRGRRQ1`+- Footprint: `Package_DFN_QFN:QFN-20-1EP_3.5x3.5mm_P0.5mm_EP2x2mm`+- 3D model: VQFN-20(3.5x3.5), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.9 mm nominal QFN height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)+- 3D model files: `lm5123qrgrrq1-etched.step` / `lm5123qrgrrq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lm5123qrgrrq1.step` / `lm5123qrgrrq1.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/lm5123-q1) (46 pp, sha256 `a525ddafaa5f90d0`, retrieved 2026-10-01, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/lm5123qrgrrq1-datasheet.pdf)
page.jsonadded+236@@ -0,0 +1,236 @@+{+ "slug": "lm5123qrgrrq1",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments DC-DC Converters, VQFN-20(3.5x3.5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "lm5123qrgrrq1",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "lm5123qrgrrq1.kicad_sym",+ "lm5123qrgrrq1.kicad_mod",+ "lm5123qrgrrq1.glb",+ "lm5123qrgrrq1.step",+ "lm5123qrgrrq1.lbr",+ "docs/hero.png",+ "docs/lm5123qrgrrq1-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "LM5123QRGRRQ1",+ "manufacturer": "Texas Instruments",+ "package": "VQFN-20(3.5x3.5)",+ "pin_count": 21,+ "category": "Power Management (PMIC)",+ "subcategory": "DC-DC Converters",+ "datasheet": "https://www.ti.com/cn/lit/gpn/lm5123-q1",+ "parts": {+ "symbol": "lm5123qrgrrq1.kicad_sym",+ "footprint": "lm5123qrgrrq1.kicad_mod",+ "model_3d": "lm5123qrgrrq1-etched.glb",+ "model_3d_plain": "lm5123qrgrrq1.glb",+ "model_3d_step": "lm5123qrgrrq1-etched.step",+ "model_3d_step_plain": "lm5123qrgrrq1.step",+ "lbr": "lm5123qrgrrq1.lbr"+ },+ "distributor_links": {+ "lcsc": "C3188675",+ "digikey": "296-LM5123QRGRRQ1TR-ND",+ "mouser": "595-LM5123QRGRRQ1"+ },+ "distributor_check": {+ "checked_at": "2026-10-01T18:02:26Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-LM5123QRGRRQ1TR-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-LM5123QRGRRQ1",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "CSP",+ "type": "input",+ "description": "Current sensing amplifier positive input pin."+ },+ {+ "number": "2",+ "name": "CSN",+ "type": "input",+ "description": "Current sensing amplifier negative input pin."+ },+ {+ "number": "3",+ "name": "VOUT/SENSE",+ "type": "input",+ "description": "Output voltage sensing pin; high-side MOSFET drain voltage sensing pin connected to drain via short low-impedance path."+ },+ {+ "number": "4",+ "name": "PGOOD",+ "type": "output",+ "description": "Power good indicator with open-drain output stage; must be pulled to ground when output voltage is below threshold."+ },+ {+ "number": "5",+ "name": "HO",+ "type": "output",+ "description": "High-side gate driver output connected to high-side N-channel MOSFET gate via short low-impedance path."+ },+ {+ "number": "6",+ "name": "SW",+ "type": "passive",+ "description": "Switch node connection and high-side MOSFET source voltage sensing pin; connected to high-side MOSFET source and low-side MOSFET drain via short low-impedance path."+ },+ {+ "number": "7",+ "name": "HB",+ "type": "passive",+ "description": "High-side driver power supply with internal bootstrap diode connected from VCC; connect 0.1μF capacitor between this pin and SW."+ },+ {+ "number": "8",+ "name": "BIAS",+ "type": "power_in",+ "description": "Power supply input voltage for VCC regulator; accepts 3.8V to 42V; connect 1μF capacitor between pin and ground."+ },+ {+ "number": "9",+ "name": "VCC",+ "type": "power_out",+ "description": "Internal VCC regulator output (5V nominal) and power supply for internal MOSFET drivers; connect 4.7μF capacitor between pin and PGND."+ },+ {+ "number": "10",+ "name": "PGND",+ "type": "power_in",+ "description": "Power ground pin connected directly to low-side N-channel MOSFET source via short low-impedance path."+ },+ {+ "number": "11",+ "name": "LO",+ "type": "output",+ "description": "Low-side gate driver output connected to low-side N-channel MOSFET gate via short low-impedance path."+ },+ {+ "number": "12",+ "name": "MODE",+ "type": "input",+ "description": "Device switching mode selection pin for FPWM, diode emulation, and skip modes; open or >500kΩ to AGND selects skip mode, <0.4V selects DE mode, >2.0V selects FPWM mode."+ },+ {+ "number": "13",+ "name": "UVLO/EN",+ "type": "input",+ "description": "Enable pin and line under-voltage lockout programming pin; device turns off below 0.35V and enables above 0.65V; connect voltage divider to supply voltage and ground."+ },+ {+ "number": "14",+ "name": "SYNC/DITHER/VH/CP",+ "type": "bidirectional",+ "description": "Synchronization clock input, clock dither and spread spectrum modulation programming pin, VCC hold pin for fast restart, and charge pump enable pin for bypass operation."+ },+ {+ "number": "15",+ "name": "RT",+ "type": "input",+ "description": "Switching frequency setting pin; connect single resistor between pin and AGND to program frequency from 100kHz to 2.2MHz without external clock on SYNC pin."+ },+ {+ "number": "16",+ "name": "VREF/RANGE",+ "type": "power_in",+ "description": "1.0V internal reference voltage output and VOUT range selection pin; connect 470pF capacitor to AGND; output voltage range selected by resistor divider during configuration (75-100kΩ for 5-20V, 20-35kΩ for 15-57V)."+ },+ {+ "number": "17",+ "name": "SS",+ "type": "bidirectional",+ "description": "Soft start time programming pin; external capacitor and internal 20μA current source set soft start ramp rate of error amplifier reference during startup."+ },+ {+ "number": "18",+ "name": "TRK",+ "type": "input",+ "description": "Output regulation target programming pin; VOUT regulated voltage programmed by voltage divider to VREF or direct D/A control; recommended operating voltage 0.25V to 1.0V."+ },+ {+ "number": "19",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground pin connected to analog ground plane via wide short path."+ },+ {+ "number": "20",+ "name": "COMP",+ "type": "output",+ "description": "Transconductive error amplifier output; connect loop compensation network between pin and AGND."+ },+ {+ "number": "21",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-4-6",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Pin 6 (SW) is classified as 'passive' rather than bidirectional because it serves as both a switch n; Pin 14 (SYNC/DITHER/VH/CP) has multiple functions mixed (sync input, dither capacitor terminal, VCC ; Exposed pad (EP) is not included in the pin list as it is not a numbered pin but is specified to be "+ ],+ "pages_sent": 46,+ "cost_usd": 0.478,+ "at": "2026-10-01T18:02:04"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/lm5123-q1",+ "pages": 46,+ "sha256": "a525ddafaa5f90d0",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 21,+ "described": 21,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}