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LM51231QRGRRQ1
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Texas Instruments DC-DC Converters, VQFN-20(3.5x3.5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+57@@ -0,0 +1,57 @@+# LM51231QRGRRQ1++**Texas Instruments** · DC-DC Converters · VQFN-20(3.5x3.5)++LM51231QRGRRQ1 from Texas Instruments, in a VQFN-20(3.5x3.5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | CSP | input | Current sense amplifier positive input pin operating from 0.8 V to 42 V with 10 V/V gain. |+| 2 | CSN | input | Current sense amplifier negative input pin with 1 µA bias current operating from 0.8 V to 42 V. |+| 3 | VOUT/SENSE | input | Output voltage sensing input connected to high-side MOSFET drain through short low-inductance path with 0.1-μF bypass capacitor. |+| 4 | PGOOD | output | Open-drain power-good indicator output asserts when VOUT exceeds undervoltage threshold of 94% of regulation target. |+| 5 | HO | output | High-side MOSFET gate driver output with 2.2 A peak sourcing current and adaptive deadtime control. |+| 6 | SW | power_in | Switching node connection between high-side MOSFET source and low-side MOSFET drain connected through short low-inductance path. |+| 7 | HB | power_in | High-side driver bootstrap supply powered by internal boot diode from VCC with 2.5 V minimum HB-SW UVLO threshold and 0.1-μF bypass capacitor. |+| 8 | BIAS | power_in | Supply voltage input (3.8 V to 42 V) to VCC regulator with 1-μF bypass capacitor and 3 µA shutdown current. |+| 9 | VCC | power_in | 5-V regulated gate driver supply output with 100 mA sourcing current limit and 4.7-μF bypass capacitor. |+| 10 | PGND | power_in | Power ground pin connected directly to low-side MOSFET source and power ground plane through short low-inductance path. |+| 11 | LO | output | Low-side MOSFET gate driver output with 3.3 A peak sinking current and independent adaptive deadtime control. |+| 12 | MODE | input | Switching mode selection input; voltage less than 0.4 V selects diode emulation mode, greater than 2.0 V selects forced PWM mode. |+| 13 | UVLO/EN | input | Device enable input with 0.45 V rising threshold and 0.35 V falling threshold, or UVLO programming through resistor voltage divider to AGND. |+| 14 | SYNC/DITHER/VH | bidirectional | Synchronization clock input (200-2200 kHz), spread spectrum dithering capacitor connection, or VCC hold pin for fast restart when voltage exceeds 2.0 V. |+| 15 | RT | input | Switching frequency setting input regulated to 0.5 V with single resistor to AGND programming frequency from 100 kHz to 2.2 MHz. |+| 16 | VREF/RANGE | power_in | 1.0-V internal reference voltage output with 470-pF bypass capacitor and output voltage range selection through resistor divider (5-20 V or 15-57 V). |+| 17 | SS | bidirectional | Soft-start capacitor connection charged by 20-μA internal current source with 1.5 V mode transition threshold from forced diode emulation to FPWM. |+| 18 | TRK | input | Output voltage regulation target programming input accepting 0.25 V to 1.0 V from D/A converter or resistor divider to VREF. |+| 19 | AGND | power_in | Analog ground reference connected to analog ground plane through wide and short path. |+| 20 | COMP | output | Error amplifier output with 10 MΩ output impedance and 3 MHz bandwidth for external Type-2 compensation network. |+| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VQFN-20(3.5x3.5) |+| Category | Power Management (PMIC) |+| Pins | 21 |++## CAD (KiCad official)++- Symbol: `LM51231QRGRRQ1`+- Footprint: `Package_DFN_QFN:QFN-20-1EP_3.5x3.5mm_P0.5mm_EP2x2mm`+- 3D model: VQFN-20(3.5x3.5), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.9 mm nominal QFN height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)+- 3D model files: `lm51231qrgrrq1-etched.step` / `lm51231qrgrrq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lm51231qrgrrq1.step` / `lm51231qrgrrq1.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590903486182223872) (44 pp, sha256 `8614b882433fad2d`, retrieved 2026-10-01, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/lm51231qrgrrq1-datasheet.pdf)
page.jsonadded+236@@ -0,0 +1,236 @@+{+ "slug": "lm51231qrgrrq1",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments DC-DC Converters, VQFN-20(3.5x3.5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "lm51231qrgrrq1",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "lm51231qrgrrq1.kicad_sym",+ "lm51231qrgrrq1.kicad_mod",+ "lm51231qrgrrq1.glb",+ "lm51231qrgrrq1.step",+ "lm51231qrgrrq1.lbr",+ "docs/hero.png",+ "docs/lm51231qrgrrq1-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "LM51231QRGRRQ1",+ "manufacturer": "Texas Instruments",+ "package": "VQFN-20(3.5x3.5)",+ "pin_count": 21,+ "category": "Power Management (PMIC)",+ "subcategory": "DC-DC Converters",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590903486182223872",+ "parts": {+ "symbol": "lm51231qrgrrq1.kicad_sym",+ "footprint": "lm51231qrgrrq1.kicad_mod",+ "model_3d": "lm51231qrgrrq1-etched.glb",+ "model_3d_plain": "lm51231qrgrrq1.glb",+ "model_3d_step": "lm51231qrgrrq1-etched.step",+ "model_3d_step_plain": "lm51231qrgrrq1.step",+ "lbr": "lm51231qrgrrq1.lbr"+ },+ "distributor_links": {+ "lcsc": "C6286802",+ "digikey": "296-LM51231QRGRRQ1TR-ND",+ "mouser": "595-LM51231QRGRRQ1"+ },+ "distributor_check": {+ "checked_at": "2026-10-01T17:18:17Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-LM51231QRGRRQ1TR-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-LM51231QRGRRQ1",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "CSP",+ "type": "input",+ "description": "Current sense amplifier positive input pin operating from 0.8 V to 42 V with 10 V/V gain."+ },+ {+ "number": "2",+ "name": "CSN",+ "type": "input",+ "description": "Current sense amplifier negative input pin with 1 µA bias current operating from 0.8 V to 42 V."+ },+ {+ "number": "3",+ "name": "VOUT/SENSE",+ "type": "input",+ "description": "Output voltage sensing input connected to high-side MOSFET drain through short low-inductance path with 0.1-μF bypass capacitor."+ },+ {+ "number": "4",+ "name": "PGOOD",+ "type": "output",+ "description": "Open-drain power-good indicator output asserts when VOUT exceeds undervoltage threshold of 94% of regulation target."+ },+ {+ "number": "5",+ "name": "HO",+ "type": "output",+ "description": "High-side MOSFET gate driver output with 2.2 A peak sourcing current and adaptive deadtime control."+ },+ {+ "number": "6",+ "name": "SW",+ "type": "power_in",+ "description": "Switching node connection between high-side MOSFET source and low-side MOSFET drain connected through short low-inductance path."+ },+ {+ "number": "7",+ "name": "HB",+ "type": "power_in",+ "description": "High-side driver bootstrap supply powered by internal boot diode from VCC with 2.5 V minimum HB-SW UVLO threshold and 0.1-μF bypass capacitor."+ },+ {+ "number": "8",+ "name": "BIAS",+ "type": "power_in",+ "description": "Supply voltage input (3.8 V to 42 V) to VCC regulator with 1-μF bypass capacitor and 3 µA shutdown current."+ },+ {+ "number": "9",+ "name": "VCC",+ "type": "power_in",+ "description": "5-V regulated gate driver supply output with 100 mA sourcing current limit and 4.7-μF bypass capacitor."+ },+ {+ "number": "10",+ "name": "PGND",+ "type": "power_in",+ "description": "Power ground pin connected directly to low-side MOSFET source and power ground plane through short low-inductance path."+ },+ {+ "number": "11",+ "name": "LO",+ "type": "output",+ "description": "Low-side MOSFET gate driver output with 3.3 A peak sinking current and independent adaptive deadtime control."+ },+ {+ "number": "12",+ "name": "MODE",+ "type": "input",+ "description": "Switching mode selection input; voltage less than 0.4 V selects diode emulation mode, greater than 2.0 V selects forced PWM mode."+ },+ {+ "number": "13",+ "name": "UVLO/EN",+ "type": "input",+ "description": "Device enable input with 0.45 V rising threshold and 0.35 V falling threshold, or UVLO programming through resistor voltage divider to AGND."+ },+ {+ "number": "14",+ "name": "SYNC/DITHER/VH",+ "type": "bidirectional",+ "description": "Synchronization clock input (200-2200 kHz), spread spectrum dithering capacitor connection, or VCC hold pin for fast restart when voltage exceeds 2.0 V."+ },+ {+ "number": "15",+ "name": "RT",+ "type": "input",+ "description": "Switching frequency setting input regulated to 0.5 V with single resistor to AGND programming frequency from 100 kHz to 2.2 MHz."+ },+ {+ "number": "16",+ "name": "VREF/RANGE",+ "type": "power_in",+ "description": "1.0-V internal reference voltage output with 470-pF bypass capacitor and output voltage range selection through resistor divider (5-20 V or 15-57 V)."+ },+ {+ "number": "17",+ "name": "SS",+ "type": "bidirectional",+ "description": "Soft-start capacitor connection charged by 20-μA internal current source with 1.5 V mode transition threshold from forced diode emulation to FPWM."+ },+ {+ "number": "18",+ "name": "TRK",+ "type": "input",+ "description": "Output voltage regulation target programming input accepting 0.25 V to 1.0 V from D/A converter or resistor divider to VREF."+ },+ {+ "number": "19",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground reference connected to analog ground plane through wide and short path."+ },+ {+ "number": "20",+ "name": "COMP",+ "type": "output",+ "description": "Error amplifier output with 10 MΩ output impedance and 3 MHz bandwidth for external Type-2 compensation network."+ },+ {+ "number": "21",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Exposed pad (EP) not included in standard pin numbering; located on package substrate providing 5.3 "+ ],+ "pages_sent": 44,+ "cost_usd": 0.3111,+ "at": "2026-10-01T17:17:54"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590903486182223872",+ "pages": 44,+ "sha256": "8614b882433fad2d",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 21,+ "described": 21,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}