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Contents

README

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LM5122QMHX

Texas Instruments · DC-DC Converters · TSSOP-20-EP

LM5122QMHX from Texas Instruments, in a TSSOP-20-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SYNCOUT output Clock output providing 180° phase shift for multiphase operation that may be left floating when unused.
2 OPT input Clock synchronization selection pin controlling master/slave configuration, must not be left floating.
3 CSN input Inverting input of current sense amplifier connected to the negative side of the sense resistor.
4 CSP input Non-inverting input of current sense amplifier connected to the positive side of the sense resistor.
5 VIN power_in Supply voltage input to internal VCC regulator accepting input voltages from 4.5V to 65V.
6 UVLO input Undervoltage lockout programming pin with shutdown (below 0.4V), standby (0.4V to 1.2V), and startup (above 1.2V) threshold modes.
7 SS input Soft-start programming pin with internal 10-μA current source controlling output voltage ramp rate during startup.
8 SYNCIN/RT input Oscillator synchronization input and timing resistor pin for frequency programming and external clock synchronization up to 2 MHz.
9 AGND power_in Analog ground connection providing return path for internal voltage reference and analog circuits.
10 FB input Feedback inverting input with 1.2V regulation threshold; sets output voltage via external resistor divider and enables slave mode if above 2.7V at power-on.
11 COMP output Error amplifier output node for connection of Type 2 compensation network to feedback pin.
12 SLOPE input Slope compensation programming pin with amplitude set by external resistor to AGND for prevention of sub-harmonic oscillation.
13 MODE input Switching mode selection with internal pullup/pulldown resistors that enable forced PWM mode (above 1.2V) or diode-emulation mode (below 1.2V).
14 RES output Restart timer pin with external capacitor for hiccup-mode off-time and restart delay programming during overload conditions.
15 PGND power_in Power ground connection pin for low-side gate driver that must connect directly to the low-side MOSFET source terminal.
16 LO output Low-side N-channel MOSFET gate driver output with 3A peak source/sink current capability requiring short low-inductance connection to gate.
17 VCC power_in Bias supply output from internal 7.6V regulator powering controller and drivers, decouple to PGND with low-ESR ceramic capacitor.
18 SW bidirectional Boost converter switching node connecting bootstrap capacitor and both MOSFET switches via short low-inductance paths for noise minimization.
19 HO output High-side N-channel MOSFET gate driver output with 3.2A peak source/sink current at 7.6V requiring short low-inductance connection to gate.
20 BST power_in Bootstrap gate-drive supply pin charged by internal 200-μA pump that maintains high-side driver supply for 100% duty-cycle bypass operation.
21 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-20-EP
Category Power Management (PMIC)
Pins 21

CAD (KiCad official)

  • Symbol: LM5122QMHX
  • Footprint: Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm
  • 3D model: TSSOP-20-EP, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.2 mm nominal TSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: lm5122qmhx-etched.step / lm5122qmhx-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lm5122qmhx.step / lm5122qmhx.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (50 pp, sha256 89895d7bdb8309ba, retrieved 2026-10-01, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF