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Contents

README

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LM5122QMH

Texas Instruments · DC-DC Controllers · HTSSOP-20

LM5122QMH from Texas Instruments, in a HTSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SYNCOUT output Clock output providing a 180° shifted clock for interleaved operation, and it can be left floating when not used.
2 OPT input Clock synchronization selection pin that also enables or disables SYNCOUT for master/slave configuration, and it should not be left floating.
3 CSN input Inverting input of the current sense amplifier, connected to the negative side of the current sense resistor.
4 CSP input Non-inverting input of the current sense amplifier, connected to the positive side of the current sense resistor.
5 VIN power_in Supply voltage input for the VCC regulator, connected to the input capacitor with short, low-impedance paths.
6 UVLO input Undervoltage lockout programming pin: below 0.4 V the regulator shuts down, 0.4 V to 1.2 V gives standby, and above 1.2 V starts the start-up sequence; it should not be left floating.
7 SS input Soft-start programming pin, where an external capacitor and an internal 10 µA current source set the ramp rate of the error amplifier reference.
8 SYNCIN/RT input Oscillator frequency programming pin set by a single resistor to AGND, which also accepts a positive pulse for external synchronization; the recommended maximum master oscillator frequency is 2 MHz, giving 1 MHz maximum switching frequency.
9 AGND power_in Analog ground connection and return for the internal voltage reference and analog circuits.
10 FB input Inverting input of the internal error amplifier with a 1.2 V regulation threshold, and the controller is configured as slave mode if FB is above 2.7 V at initial power-on.
11 COMP output Output of the internal error amplifier, with the loop compensation network connected between this pin and FB.
12 SLOPE input Slope compensation programmed by a single resistor between SLOPE and AGND.
13 MODE input Switching mode selection pin, where a voltage above the 1.2 V threshold forces PWM mode and below 1.2 V selects diode emulation mode, with a 700 kΩ pullup and 100 kΩ pulldown holding it at 0.15 V by default.
14 RES output Restart timer pin for an external capacitor that sets hiccup-mode off-time and restart delay during overload, and it should connect directly to AGND when hiccup mode is not required.
15 PGND power_in Power ground connection for the low-side N-channel MOSFET gate driver, connected directly to the source of the low-side MOSFET.
16 LO output Low-side N-channel MOSFET gate drive output, connected to the low-side MOSFET gate through a short, low-inductance path.
17 VCC power_out VCC bias supply pin that must be locally decoupled to PGND with a low ESR/ESL capacitor placed as close as possible to the controller.
18 SW bidirectional Switching node of the boost regulator, connected to the bootstrap capacitor, the high-side MOSFET source, and the low-side MOSFET drain through short, low-inductance paths.
19 HO output High-side N-channel MOSFET gate drive output, connected to the high-side synchronous MOSFET gate through a short, low-inductance path.
20 BST power_out High-side driver bootstrap supply, connected to the bootstrap diode cathode and bootstrap capacitor, with an internal charge pump supplying 200 µA for bypass operation.
21 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package HTSSOP-20
Category Power Supply Chip
Pins 21

CAD (KiCad official)

  • Symbol: LM5122QMH
  • Footprint: Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm
  • 3D model: HTSSOP-20, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.2 mm nominal TSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: lm5122qmh-etched.step / lm5122qmh-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lm5122qmh.step / lm5122qmh.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (50 pp, sha256 89895d7bdb8309ba, retrieved 2026-10-11, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF