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Initial commit: component/lm5117qpmhx

Ray ·fe82d6c824 ·1d ago
2 files changed +335
README.mdadded+58
@@ -0,0 +1,58 @@+# LM5117QPMHX++**Texas Instruments** · DC-DC Controllers · HTSSOP-20-EP++LM5117QPMHX from Texas Instruments, in a HTSSOP-20-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | UVLO | input | Undervoltage lockout programming pin: below 0.4 V the regulator shuts down, 0.4 V to 1.25 V gives standby with no switching, and above 1.25 V switching is enabled with a 20μA source flowing through the external UVLO resistors for hysteresis. |+| 2 | DEMB | input | Optional logic input that enables diode emulation when low and disables it when high, with an internal 50-kΩ pull-down that enables diode emulation if the pin is left floating. |+| 3 | RES | output | Restart timer pin whose capacitor sets the off time of hiccup-mode current limiting; hiccup starts after 256 consecutive PWM cycles of cycle-by-cycle current limiting and a 10μA source charges the capacitor to 1.25 V to restart the controller. |+| 4 | SS | input | Soft-start pin where an external capacitor and an internal 10μA source set the ramp rate of the error amplifier reference, and the pin is held low when VCC is below 5 V, UVLO is below 1.25 V, or during thermal shutdown. |+| 5 | RT | input | Oscillator timing pin programmed by a single resistor to AGND, with a recommended maximum oscillator frequency of 750 kHz, and the oscillator can be synchronized by coupling a positive pulse through a small capacitor. |+| 6 | AGND | power_in | Analog ground, the return for the internal 0.8 V voltage reference and analog circuits. |+| 7 | VCCDIS | input | Optional input that disables the internal VCC regulator when above 1.25 V, with an internal 500-kΩ pull-down that keeps the regulator enabled when the pin is left floating. |+| 8 | FB | input | Inverting input of the internal error amplifier, where a resistor divider from the output sets the output voltage against a regulation threshold of 0.8 V. |+| 9 | COMP | output | Output of the internal error amplifier, with the loop compensation network connected between this pin and FB. |+| 10 | CM | output | Current monitor output that provides the average of the sensed inductor current, to be connected directly between CM and AGND and left floating when unused. |+| 11 | RAMP | input | PWM ramp signal pin where an external resistor and capacitor between SW, RAMP and AGND set a ramp slope proportional to input supply voltage. |+| 12 | CS | input | Current sense amplifier input, connected to the high side of the current sense resistor. |+| 13 | CSG | power_in | Kelvin ground connection to the current sense resistor, connected directly to its low side. |+| 14 | PGND | power_in | Power ground return for the low-side NMOS gate driver, connected directly to the low side of the current sense resistor. |+| 15 | LO | output | Low-side NMOS gate drive output, connected to the low-side synchronous NMOS gate through a short, low-inductance path. |+| 16 | VCC | power_in | Bias supply pin with a 5.5 V to 14 V recommended range, to be locally decoupled to PGND with a low ESR/ESL capacitor placed as close to the controller as possible. |+| 17 | SW | output | Switching node of the buck regulator, connected to the bootstrap capacitor, high-side NMOS source and low-side NMOS drain through a short, low-inductance path, with an absolute maximum range of -3.0 V to 75 V to AGND. |+| 18 | HO | output | High-side NMOS gate drive output, connected to the high-side NMOS gate through a short, low-inductance path. |+| 19 | HB | power_in | High-side driver supply for the bootstrap gate drive, connected to the bootstrap diode cathode and bootstrap capacitor, which should be placed as close to the controller as possible, with a recommended HB to SW range of 5.5 V to 14 V. |+| 20 | VIN | power_in | Supply voltage input for the VCC regulator, with a recommended operating range of 5.5 V to 65 V. |+| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | HTSSOP-20-EP |+| Category | Power Supply Chip |+| Pins | 21 |++## CAD (KiCad official)++- Symbol: `LM5117QPMHX`+- Footprint: `Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm`+- 3D model: HTSSOP-20-EP, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.2 mm nominal TSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)+- 3D model files: `lm5117qpmhx-etched.step` / `lm5117qpmhx-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lm5117qpmhx.step` / `lm5117qpmhx.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/lm5117) (49 pp, sha256 `9e27f24e84faebf5`, retrieved 2026-10-08, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/lm5117qpmhx-datasheet.pdf)
page.jsonadded+277
@@ -0,0 +1,277 @@+{+  "slug": "lm5117qpmhx",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments DC-DC Controllers, HTSSOP-20-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "power supply chip",+    "lm5117qpmhx",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "lm5117qpmhx.kicad_sym",+    "lm5117qpmhx.kicad_mod",+    "lm5117qpmhx.glb",+    "lm5117qpmhx.step",+    "lm5117qpmhx.lbr",+    "docs/hero.png",+    "docs/lm5117qpmhx-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "lm5117qpmhx-hero.glb",+    "lm5117qpmhx-hero.overlay.json"+  ],+  "component": {+    "mpn": "LM5117QPMHX",+    "manufacturer": "Texas Instruments",+    "package": "HTSSOP-20-EP",+    "pin_count": 21,+    "category": "Power Supply Chip",+    "subcategory": "DC-DC Controllers",+    "datasheet": "https://www.ti.com/cn/lit/gpn/lm5117",+    "parts": {+      "symbol": "lm5117qpmhx.kicad_sym",+      "footprint": "lm5117qpmhx.kicad_mod",+      "model_3d": "lm5117qpmhx-hero.glb",+      "model_3d_plain": "lm5117qpmhx.glb",+      "model_3d_step": "lm5117qpmhx-etched.step",+      "model_3d_step_plain": "lm5117qpmhx.step",+      "lbr": "lm5117qpmhx.lbr"+    },+    "distributor_links": {+      "lcsc": "C2658653"+    },+    "distributor_check": {+      "checked_at": "2026-10-08T18:44:19Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": null,+        "status": "no match"+      },+      "mouser": {+        "pn": null,+        "status": "no match"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "UVLO",+        "type": "input",+        "description": "Undervoltage lockout programming pin: below 0.4 V the regulator shuts down, 0.4 V to 1.25 V gives standby with no switching, and above 1.25 V switching is enabled with a 20μA source flowing through the external UVLO resistors for hysteresis."+      },+      {+        "number": "2",+        "name": "DEMB",+        "type": "input",+        "description": "Optional logic input that enables diode emulation when low and disables it when high, with an internal 50-kΩ pull-down that enables diode emulation if the pin is left floating."+      },+      {+        "number": "3",+        "name": "RES",+        "type": "output",+        "description": "Restart timer pin whose capacitor sets the off time of hiccup-mode current limiting; hiccup starts after 256 consecutive PWM cycles of cycle-by-cycle current limiting and a 10μA source charges the capacitor to 1.25 V to restart the controller."+      },+      {+        "number": "4",+        "name": "SS",+        "type": "input",+        "description": "Soft-start pin where an external capacitor and an internal 10μA source set the ramp rate of the error amplifier reference, and the pin is held low when VCC is below 5 V, UVLO is below 1.25 V, or during thermal shutdown."+      },+      {+        "number": "5",+        "name": "RT",+        "type": "input",+        "description": "Oscillator timing pin programmed by a single resistor to AGND, with a recommended maximum oscillator frequency of 750 kHz, and the oscillator can be synchronized by coupling a positive pulse through a small capacitor."+      },+      {+        "number": "6",+        "name": "AGND",+        "type": "power_in",+        "description": "Analog ground, the return for the internal 0.8 V voltage reference and analog circuits."+      },+      {+        "number": "7",+        "name": "VCCDIS",+        "type": "input",+        "description": "Optional input that disables the internal VCC regulator when above 1.25 V, with an internal 500-kΩ pull-down that keeps the regulator enabled when the pin is left floating."+      },+      {+        "number": "8",+        "name": "FB",+        "type": "input",+        "description": "Inverting input of the internal error amplifier, where a resistor divider from the output sets the output voltage against a regulation threshold of 0.8 V."+      },+      {+        "number": "9",+        "name": "COMP",+        "type": "output",+        "description": "Output of the internal error amplifier, with the loop compensation network connected between this pin and FB."+      },+      {+        "number": "10",+        "name": "CM",+        "type": "output",+        "description": "Current monitor output that provides the average of the sensed inductor current, to be connected directly between CM and AGND and left floating when unused."+      },+      {+        "number": "11",+        "name": "RAMP",+        "type": "input",+        "description": "PWM ramp signal pin where an external resistor and capacitor between SW, RAMP and AGND set a ramp slope proportional to input supply voltage."+      },+      {+        "number": "12",+        "name": "CS",+        "type": "input",+        "description": "Current sense amplifier input, connected to the high side of the current sense resistor."+      },+      {+        "number": "13",+        "name": "CSG",+        "type": "power_in",+        "description": "Kelvin ground connection to the current sense resistor, connected directly to its low side."+      },+      {+        "number": "14",+        "name": "PGND",+        "type": "power_in",+        "description": "Power ground return for the low-side NMOS gate driver, connected directly to the low side of the current sense resistor."+      },+      {+        "number": "15",+        "name": "LO",+        "type": "output",+        "description": "Low-side NMOS gate drive output, connected to the low-side synchronous NMOS gate through a short, low-inductance path."+      },+      {+        "number": "16",+        "name": "VCC",+        "type": "power_in",+        "description": "Bias supply pin with a 5.5 V to 14 V recommended range, to be locally decoupled to PGND with a low ESR/ESL capacitor placed as close to the controller as possible."+      },+      {+        "number": "17",+        "name": "SW",+        "type": "output",+        "description": "Switching node of the buck regulator, connected to the bootstrap capacitor, high-side NMOS source and low-side NMOS drain through a short, low-inductance path, with an absolute maximum range of -3.0 V to 75 V to AGND."+      },+      {+        "number": "18",+        "name": "HO",+        "type": "output",+        "description": "High-side NMOS gate drive output, connected to the high-side NMOS gate through a short, low-inductance path."+      },+      {+        "number": "19",+        "name": "HB",+        "type": "power_in",+        "description": "High-side driver supply for the bootstrap gate drive, connected to the bootstrap diode cathode and bootstrap capacitor, which should be placed as close to the controller as possible, with a recommended HB to SW range of 5.5 V to 14 V."+      },+      {+        "number": "20",+        "name": "VIN",+        "type": "power_in",+        "description": "Supply voltage input for the VCC regulator, with a recommended operating range of 5.5 V to 65 V."+      },+      {+        "number": "21",+        "name": "EP",+        "type": "passive",+        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-5-5",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: The datasheet classifies RES as type O (output); it is a capacitor timing node charged by an interna; The datasheet uses combined classes (LO P/O/I, HO P, VCC I/O, HB P/I, VIN P/I); mapped to output, ou; Ground pins PGND, CSG and AGND are typed G or O in the datasheet; mapped to power_in per the GND rul",+          "exposed pad 21 added from the footprint",+          "dropped thermal pad ['EP'] absent from footprint"+        ],+        "pages_sent": 10,+        "cost_usd": 0.0828,+        "at": "2026-10-08T18:43:07"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/lm5117",+        "pages": 49,+        "sha256": "9e27f24e84faebf5",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 21,+        "described": 21,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    },+    "models_3d": [+      {+        "file": "lm5117qpmhx.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          6.41,+          6.5,+          1.2+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "cac0c3bcf1410dc2b97b736fbf1ad6d0fbd6c9220630ec523faa74f21b8fb971",+        "checked": "2026-10-08",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      },+      {+        "file": "lm5117qpmhx-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          6.41,+          6.5,+          1.2+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "49665c3d2caa0ee74d5480bd8c4ad03f6bed4c2751135bfd44414b9a2bded635",+        "checked": "2026-10-08",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      }+    ]+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file