component
LM5117QPMHE
Public Made by Adomby adom
Texas Instruments DC-DC Converters, HTSSOP-20-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "lm5117qpmhe",
"version": "0.1.0",
"type": "component",
"description": "Texas Instruments DC-DC Converters, HTSSOP-20-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"power management (pmic)",
"lm5117qpmhe",
"factory-2.0.0",
"extractor-text"
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"dependencies": {},
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"docs/lm5117qpmhe-datasheet.pdf",
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"component": {
"mpn": "LM5117QPMHE",
"manufacturer": "Texas Instruments",
"package": "HTSSOP-20-EP",
"pin_count": 21,
"category": "Power Management (PMIC)",
"subcategory": "DC-DC Converters",
"datasheet": "https://www.ti.com/cn/lit/gpn/lm5117",
"parts": {
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"lbr": "lm5117qpmhe.lbr"
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"distributor_links": {
"lcsc": "C2860704"
},
"distributor_check": {
"checked_at": "2026-10-07T22:32:07Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": null,
"status": "no match"
},
"mouser": {
"pn": null,
"status": "no match"
}
},
"pins": [
{
"number": "1",
"name": "UVLO",
"type": "input",
"description": "Undervoltage lockout programming pin: below 0.4 V the regulator is shut down, 0.4 V to 1.25 V gives standby with no HO/LO switching, and above 1.25 V enables switching, with a 20 µA source through the external UVLO resistors providing hysteresis."
},
{
"number": "2",
"name": "DEMB",
"type": "input",
"description": "Optional logic input where low enables diode emulation (low-side NMOS latched off after reverse current is detected) and high disables it, with an internal 50 kΩ pull-down that enables emulation when floating."
},
{
"number": "3",
"name": "RES",
"type": "output",
"description": "Restart timer pin that sets the hiccup-mode off time; hiccup begins after 256 consecutive PWM cycles of cycle-by-cycle current limiting, and a 10 µA source then charges the RES capacitor to 1.25 V to restart the controller."
},
{
"number": "4",
"name": "SS",
"type": "input",
"description": "Soft-start pin where an external capacitor and an internal 10 µA source set the error amplifier reference ramp rate, and the pin is held low when VCC < 5 V, UVLO < 1.25 V or during thermal shutdown."
},
{
"number": "5",
"name": "RT",
"type": "input",
"description": "Oscillator timing pin programmed by a single resistor to AGND, with a recommended maximum oscillator frequency of 750 kHz, and synchronizable to an external clock through a small coupling capacitor."
},
{
"number": "6",
"name": "AGND",
"type": "power_in",
"description": "Analog ground and return for the internal 0.8 V voltage reference and analog circuits."
},
{
"number": "7",
"name": "VCCDIS",
"type": "input",
"description": "Optional input that disables the internal VCC regulator when above 1.25 V, with an internal 500 kΩ pull-down that keeps the regulator enabled when the pin is floating."
},
{
"number": "8",
"name": "FB",
"type": "input",
"description": "Inverting input of the internal error amplifier, where a resistor divider from the output sets the output voltage against a 0.8 V regulation threshold."
},
{
"number": "9",
"name": "COMP",
"type": "output",
"description": "Output of the internal error amplifier, with the loop compensation network connected between this pin and FB."
},
{
"number": "10",
"name": "CM",
"type": "output",
"description": "Current monitor output that provides the average sensed inductor current, to be monitored between CM and AGND, and left floating when not used."
},
{
"number": "11",
"name": "RAMP",
"type": "input",
"description": "PWM ramp input where an external resistor and capacitor between SW, RAMP and AGND set a ramp slope proportional to the input supply voltage."
},
{
"number": "12",
"name": "CS",
"type": "input",
"description": "Current sense amplifier input to be connected to the high side of the current sense resistor."
},
{
"number": "13",
"name": "CSG",
"type": "power_in",
"description": "Kelvin ground connection to be connected directly to the low side of the current sense resistor."
},
{
"number": "14",
"name": "PGND",
"type": "power_in",
"description": "Power ground return for the low-side NMOS gate driver, to be connected directly to the low side of the current sense resistor."
},
{
"number": "15",
"name": "LO",
"type": "output",
"description": "Low-side NMOS gate drive output, to be connected to the synchronous low-side gate through a short, low-inductance path."
},
{
"number": "16",
"name": "VCC",
"type": "power_in",
"description": "Bias supply pin that should be decoupled to PGND with a low ESR/ESL capacitor placed as close to the controller as possible."
},
{
"number": "17",
"name": "SW",
"type": "output",
"description": "Switching node of the buck regulator, connected to the bootstrap capacitor, high-side NMOS source and low-side NMOS drain through a short, low-inductance path."
},
{
"number": "18",
"name": "HO",
"type": "output",
"description": "High-side NMOS gate drive output, to be connected to the high-side gate through a short, low-inductance path."
},
{
"number": "19",
"name": "HB",
"type": "power_in",
"description": "High-side driver supply for the bootstrap gate drive, connected to the external bootstrap diode cathode and bootstrap capacitor, placed as close to the controller as possible."
},
{
"number": "20",
"name": "VIN",
"type": "power_in",
"description": "Supply voltage input for the VCC regulator, with VIN to AGND rated at −0.3 V to 75 V absolute maximum and 5.5 V to 65 V recommended."
},
{
"number": "21",
"name": "EP",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The pinout is taken from the HTSSOP (PWP) column of the Pin Functions table, which the datasheet pai; The datasheet covers both LM5117 and LM5117-Q1. The HTSSOP pin table is shared between them, but the; The text extraction garbled the Type column for some pins (PGND, LO, HO, VCC, HB, VIN). Types were a",
"exposed pad 21 added from the footprint",
"dropped thermal pad ['EP'] absent from footprint"
],
"pages_sent": 10,
"cost_usd": 0.0811,
"at": "2026-10-07T22:31:43"
},
"datasheet": {
"url": "https://www.ti.com/cn/lit/gpn/lm5117",
"pages": 49,
"sha256": "9e27f24e84faebf5",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 21,
"described": 21,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
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"zmin_mm": 0.0,
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"checked": "2026-10-07",
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}