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Contents

README

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LM5072MHX-80

Texas Instruments · Power Over Ethernet (PoE) Controllers · HTSSOP-16-EP

LM5072MHX-80 from Texas Instruments, in a HTSSOP-16-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RT passive PWM controller oscillator frequency programming pin.
2 SS passive Soft-start programming pin.
3 VIN power_in Positive supply pin for the PD interface and the internal PWM controller start-up regulator.
4 RCLASS passive PD classification programming pin.
5 ICL_FAUX bidirectional Inrush current limit programming pin that also serves as the front auxiliary power enable pin.
6 DCCL passive PD interface DC current limit programming pin.
7 VEE power_in Negative supply pin for the PD interface, connected to the PoE and/or front auxiliary power return path.
8 RTN power_in PWM controller power return, connected to the drain of the internal PD interface hot swap MOSFET and to be externally connected to the PWM controller reference ground.
9 OUT output PWM controller gate driver output pin.
10 VCC power_out PWM controller start-up regulator output pin.
11 nPGOOD output PD interface Power Good indicator and delay timer pin, where an active low state indicates the PoE interface is in normal operation.
12 CS input PWM controller current sense input pin.
13 RAUX input Rear auxiliary power enable pin that can be programmed for auxiliary power dominance over PoE power.
14 FB input PWM controller voltage feedback pin and inverting input of the internal error amplifier; connect to ARTN to disable the error amplifier in isolated DC-DC converter applications.
15 COMP bidirectional Output of the internal error amplifier and control input to the PWM comparator, controlled by the secondary side error amplifier via an opto-coupler in isolated applications.
16 ARTN power_in PWM controller reference ground pin that should be shorted externally to RTN as a single point ground connection to improve noise immunity.
17 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package HTSSOP-16-EP
Category Power Management (PMIC)
Pins 17

CAD (KiCad official)

  • Symbol: LM5072MHX-80
  • Footprint: Package_SO:TSSOP-16-1EP_4.4x5mm_P0.65mm
  • 3D model: HTSSOP-16-EP (KiCad packages3D, STEP)
  • 3D model files: lm5072mhx-80-etched.step / lm5072mhx-80-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lm5072mhx-80.step / lm5072mhx-80.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (37 pp, sha256 2880e6942fe74392, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF