component
LM5071MTX-50
Public Made by Adomby adom
Texas Instruments Power Over Ethernet (PoE) Controllers, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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LM5071MTX-50
Texas Instruments · Power Over Ethernet (PoE) Controllers · TSSOP-16
LM5071MTX-50 from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | System high potential input, the more positive input potential of the diode OR'd supply lines entering the PD. |
| 2 | RSIG | passive | Signature resistor pin; a resistor connected from VIN to this pin is used for signature detection and sits in parallel with the UVLO resistors. |
| 3 | RCLASS | passive | Classification resistor pin; the classification programming resistor connects from this pin to VEE. |
| 4 | AUX | input | Auxiliary input power startup pin with a 2.5V threshold, programmed by a resistor divider to VEE, with an internal pull-down above 300kΩ if left open. |
| 5 | UVLO | input | Line under-voltage lockout pin with a 2.00V threshold, programmed by an external resistor divider from VIN to UVLORTN with 10uA hysteresis current. |
| 6 | UVLORTN | passive | Return for the external UVLO resistors, connected to the bottom resistor of the UVLO divider. |
| 7 | VEE | power_in | System low potential input, the more negative input potential of the diode OR'd supply lines, such as the PSE -48V supply. |
| 8 | RTN | power_in | System return for the PWM converter, being the drain of the internal current limiting power MOSFET that connects VEE to the dc-dc converter return path. |
| 9 | OUT | output | Output of the PWM controller driving the DC-DC converter gate, with 800mA peak sink current capability. |
| 10 | VCC | power_out | Output of the internal high voltage series pass regulator, nominally regulated to 7.8V. |
| 11 | FB | input | Feedback signal, the inverting input of the internal error amplifier, with the non-inverting input tied to a 1.25V reference. |
| 12 | COMP | output | Output of the error amplifier and input to the PWM comparator, with an internal 5K pull-up resistor usable to bias an opto-coupler transistor. |
| 13 | CS | input | Current sense input for current mode control and over-current protection, where the OUT pin switches low if CS exceeds 0.5V. |
| 14 | RT / SYNC | input | Oscillator timing resistor pin, with an external resistor to ARTN setting the oscillator frequency, which also accepts narrow ac-coupled synchronization pulses. |
| 15 | SS | passive | Soft-start input where an external capacitor and an internal 10uA current source set the soft-start ramp rate. |
| 16 | ARTN | power_in | Analog PWM supply return for sensitive analog circuitry, including the SMPS current limit amplifier. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-16 |
| Category | Power Management (PMIC) |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Signature Resistor Disable / Classification Current Turn On | VCLSS(ON) | 10 | 11.5 | 12.5 | V | VIN with respect to VEE | 5 |
| Classification Current Turn Off | VCLSS(OFF) | 23.5 | 25 | 26.5 | V | VIN with respect to VEE | 5 |
| Classification Voltage | 1.43 | 1.5 | 1.57 | V | With respect to VEE | 5 | |
| UVLO Pin Reference Voltage | 1.95 | 2 | 2.05 | V | VIN > 27V | 5 | |
| UVLO Hysteresis Current | 8 | 10 | 11.5 | uA | VIN > UVLO | 5 | |
| Softstart Release | 1.2 | 1.45 | 1.7 | V | RTN falling with respect to VEE | 5 | |
| Softstart Release Hysteresis | 0.8 | 1.1 | 1.3 | V | RTN rising with respect to VEE | 5 | |
| AUX Pin Threshold | 2.4 | 2.5 | 2.65 | V | AUX pin rising with respect to VEE | 5 | |
| AUX Pin Threshold Hysteresis | 0.4 | 0.5 | 0.6 | V | AUX pin falling with respect to VEE | 5 | |
| Inrush Current Limit | IINRUSH | 70 | 100 | 130 | mA | VEE = 0V, RTN = 3.0V | 5 |
| DC Current Limit | ILIM | 350 | 390 | 420 | mA | VEE = 0V, RTN = 3.0V, Temp = 0°C to 85°C | 5 |
| DC Current Limit | ILIM | 325 | 390 | 420 | mA | VEE = 0V, RTN = 3.0V, Temp = -40°C to 125°C | 5 |
| VCC Regulation | VccReg | 7.5 | 7.8 | 8.1 | V | Open ckt | 5 |
| VCC UVLO (Falling) | 5.9 | 6.25 | 6.6 | V | 5 | ||
| Cycle by Cycle Current Limit Threshold Voltage | 0.44 | 0.5 | 0.56 | V | 5 | ||
| Softstart Current Source | 7 | 10 | 13 | uA | 6 | ||
| Oscillator Frequency1 | 175 | 200 | 225 | KHz | RT = 30.3K | 6 | |
| Oscillator Frequency2 | 505 | 580 | 665 | KHz | RT = 10.5K | 6 | |
| COMP Open Circuit Voltage | 4.5 | 5.4 | 6.3 | V | 6 | ||
| COMP Short Circuit Current | 0.6 | 1.1 | 1.5 | mA | COMP= 0V | 6 | |
| Max Duty Cycle (-50 Device) | 50 | % | 6 | ||||
| Junction to Ambient (PW Package) | θJA | 125 | °C/W | 6 | |||
| VIN, RTN to VEE | -0.3 | 80 | V | 4 | |||
| VIN, RTN to VEE derated | -0.3 | 76 | V | Derated at -40°C | 4 | ||
| RSIG to VIN | -12 | 0 | V | 4 | |||
| AUX to VEE | -0.3 | 57 | V | 4 | |||
| UVLO to VEE | -0.3 | 13 | V | 4 | |||
| RCLASS to VEE | -0.3 | 7 | V | 4 | |||
| ARTN to RTN | -0.3 | 0.3 | V | 4 | |||
| VCC, OUT to ARTN | -0.3 | 16 | V | 4 | |||
| All other inputs to ARTN | -0.3 | 7 | V | 4 | |||
| ESD Rating Human Body Model | 2000 | V | Human Body Model | 4 | |||
| Lead Temperature Wave | 260 | °C | Wave (4 seconds) | 4 | |||
| Lead Temperature Infrared | 240 | °C | Infrared (10 seconds) | 4 | |||
| Lead Temperature Vapor Phase | 219 | °C | Vapor Phase (75 seconds) | 4 | |||
| VIN voltage | 1.8 | 60 | V | 4 | |||
| External voltage applied to VCC | 8.1 | 15 | V | 4 | |||
| Operating Junction Temperature | -40 | 125 | °C | 4 |
CAD (KiCad official)
- Symbol:
LM5071MTX-50 - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
lm5071mtx-50-etched.step/lm5071mtx-50-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lm5071mtx-50.step/lm5071mtx-50.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (27 pp, sha256
4e573906dfea5690, retrieved 2026-11-06, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).