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LM5070MTCX-50

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Texas Instruments Power Over Ethernet (PoE) Controllers, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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LM5070MTCX-50

Texas Instruments · Power Over Ethernet (PoE) Controllers · TSSOP-16

LM5070MTCX-50 from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in System high potential input; the positive power supply connection from the Power over Ethernet source in the range 1.8V to 75V.
2 RSIG passive Signature resistor pin; connect a 25kΩ external signature resistor from VIN to this pin to enable IEEE 802.3af detection mode.
3 RCLASS passive Classification resistor pin; connect the external classification programming resistor from this pin to VEE to set the device power class (0-4).
4 UVLO input Undervoltage lockout threshold pin; the voltage at this pin is compared to a 2.00V reference to enable or disable converter operation based on VIN levels set by external resistor divider.
5 UVLORTN passive Return pin for the external UVLO resistor divider network; provides the reference point between the upper and lower UVLO programming resistors.
6 RCLP passive Current limit programming pin; connect an external resistor from this pin to VEE to program the inrush current limit from 75mA to 390mA, or leave open for the default 390mA limit.
7 VEE power_in System low potential input and negative power supply return; the more negative input potential (0V reference, absolute rating −0.3V to 80V with respect to RTN).
8 RTN power_in System return for the PWM converter; the drain of the internal current limiting power MOSFET which connects VEE to the return path of the DC-DC converter.
9 OUT output Gate driver output of the PWM controller; provides the DC-DC converter control signal with 800mA peak sink and source current capability.
10 VCC power_out Regulated output of the internal high voltage series pass regulator; typical output voltage 7.8V nominal (5.9V to 8.1V operating range, 15mA current limited).
11 FB input Feedback signal input to the inverting terminal of the internal error amplifier (non-inverting reference fixed at 1.25V) for output voltage regulation in non-isolated applications.
12 COMP output Error amplifier output and PWM comparator input; open-drain output with internal 5K pull-up to 5V reference, used for loop compensation and PWM duty cycle control.
13 CS input Current sense input for cycle-by-cycle current mode control and over-current protection; if CS voltage exceeds 0.5V threshold, the OUT pin switches low immediately.
14 RT/SYNC passive Oscillator timing resistor pin and synchronization input; external resistor from RT to ARTN sets the switching frequency, and accepts narrow AC-coupled synchronization pulses from external clock.
15 SS input Soft-start input pin; connect an external capacitor to control the soft-start ramp rate via internal 10μA current source to achieve gradual power-on without output overshoot.
16 ARTN power_in Analog PWM supply return and ground reference for sensitive analog circuitry including the SMPS current limit amplifier and gate driver return.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category Power Management (PMIC)
Pins 16

CAD (KiCad official)

  • Symbol: LM5070MTCX-50
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: lm5070mtcx-50-etched.step / lm5070mtcx-50-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lm5070mtcx-50.step / lm5070mtcx-50.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (27 pp, sha256 b419d62f541011b3, retrieved 2026-09-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF