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LM5060QDGSRQ1
Public Made by Adomby adom
Texas Instruments Surge Protection Devices (SPDs), VSSOP-10-0.5mm. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+46@@ -0,0 +1,46 @@+# LM5060QDGSRQ1++**Texas Instruments** · Surge Protection Devices (SPDs) · VSSOP-10-0.5mm++LM5060QDGSRQ1 from Texas Instruments, in a VSSOP-10-0.5mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | SENSE | input | Input voltage sense pin where a 16 µA typical constant current sink flows through an external resistor to set the threshold for VDS fault detection. |+| 2 | VIN | power_in | Supply voltage input with an operating range of 5.5 V to 65 V; the internal power-on-reset typically becomes active above 5.1 V, and a small ceramic bypass capacitor close to this pin is recommended. |+| 3 | OVP | input | Over-voltage comparator input that pulls GATE low when the pin exceeds the typical 2.0 V threshold without latching off, and normal operation resumes when it falls below typically 1.76 V. |+| 4 | UVLO | input | Under-voltage lockout comparator input that releases the GATE pull-down above typically 1.6 V, and includes a 5.5 µA typical current sink that holds it low when open. |+| 5 | EN | input | Enable input where a voltage below 0.8 V switches the device to low-current shutdown and a voltage above 2.0 V enables the internal bias and UVLO comparator, with a 6 µA typical sink holding it low when open. |+| 6 | GND | power_in | Circuit ground for the device. |+| 7 | TIMER | bidirectional | Timing capacitor pin that sets the VDS fault detection delay; when it exceeds the 2.0 V threshold the MOSFET is latched off, and the absolute maximum rating to GND is 7 V. |+| 8 | nPGD | output | Open-drain fault status output that indicates a VDS fault when high, with the datasheet recommending the low-state sink current be limited below 5 mA. |+| 9 | OUT | input | Output voltage sense pin connected to the external MOSFET source, used internally to detect VDS and VGS conditions. |+| 10 | GATE | output | Gate drive output for the external N-channel MOSFET, charged by a 24 µA typical constant current source and clamped by an internal zener typically 16.8 V above the OUT pin. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VSSOP-10-0.5mm |+| Category | Circuit Protection |+| Pins | 10 |++## CAD (KiCad official)++- Symbol: `LM5060QDGSRQ1`+- Footprint: `Package_SO:MSOP-10_3x3mm_P0.5mm`+- 3D model: VSSOP-10-0.5mm (KiCad packages3D, STEP)+- 3D model files: `lm5060qdgsrq1-etched.step` / `lm5060qdgsrq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lm5060qdgsrq1.step` / `lm5060qdgsrq1.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/lm5060-q1) (41 pp, sha256 `38a3fbe1f0f97004`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/lm5060qdgsrq1-datasheet.pdf)
page.jsonadded+211@@ -0,0 +1,211 @@+{+ "slug": "lm5060qdgsrq1",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Surge Protection Devices (SPDs), VSSOP-10-0.5mm. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "circuit protection",+ "lm5060qdgsrq1",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "lm5060qdgsrq1.kicad_sym",+ "lm5060qdgsrq1.kicad_mod",+ "lm5060qdgsrq1.glb",+ "lm5060qdgsrq1.step",+ "lm5060qdgsrq1.lbr",+ "docs/hero.png",+ "docs/lm5060qdgsrq1-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "lm5060qdgsrq1-hero.glb",+ "lm5060qdgsrq1-hero.overlay.json"+ ],+ "component": {+ "mpn": "LM5060QDGSRQ1",+ "manufacturer": "Texas Instruments",+ "package": "VSSOP-10-0.5mm",+ "pin_count": 10,+ "category": "Circuit Protection",+ "subcategory": "Surge Protection Devices (SPDs)",+ "datasheet": "https://www.ti.com/cn/lit/gpn/lm5060-q1",+ "parts": {+ "symbol": "lm5060qdgsrq1.kicad_sym",+ "footprint": "lm5060qdgsrq1.kicad_mod",+ "model_3d": "lm5060qdgsrq1-hero.glb",+ "model_3d_plain": "lm5060qdgsrq1.glb",+ "model_3d_step": "lm5060qdgsrq1-etched.step",+ "model_3d_step_plain": "lm5060qdgsrq1.step",+ "lbr": "lm5060qdgsrq1.lbr"+ },+ "distributor_links": {+ "lcsc": "C2677037",+ "digikey": "296-51307-2-ND",+ "mouser": "595-LM5060QDGSRQ1"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T00:57:57Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-51307-2-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "595-LM5060QDGSRQ1",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "SENSE",+ "type": "input",+ "description": "Input voltage sense pin where a 16 µA typical constant current sink flows through an external resistor to set the threshold for VDS fault detection."+ },+ {+ "number": "2",+ "name": "VIN",+ "type": "power_in",+ "description": "Supply voltage input with an operating range of 5.5 V to 65 V; the internal power-on-reset typically becomes active above 5.1 V, and a small ceramic bypass capacitor close to this pin is recommended."+ },+ {+ "number": "3",+ "name": "OVP",+ "type": "input",+ "description": "Over-voltage comparator input that pulls GATE low when the pin exceeds the typical 2.0 V threshold without latching off, and normal operation resumes when it falls below typically 1.76 V."+ },+ {+ "number": "4",+ "name": "UVLO",+ "type": "input",+ "description": "Under-voltage lockout comparator input that releases the GATE pull-down above typically 1.6 V, and includes a 5.5 µA typical current sink that holds it low when open."+ },+ {+ "number": "5",+ "name": "EN",+ "type": "input",+ "description": "Enable input where a voltage below 0.8 V switches the device to low-current shutdown and a voltage above 2.0 V enables the internal bias and UVLO comparator, with a 6 µA typical sink holding it low when open."+ },+ {+ "number": "6",+ "name": "GND",+ "type": "power_in",+ "description": "Circuit ground for the device."+ },+ {+ "number": "7",+ "name": "TIMER",+ "type": "bidirectional",+ "description": "Timing capacitor pin that sets the VDS fault detection delay; when it exceeds the 2.0 V threshold the MOSFET is latched off, and the absolute maximum rating to GND is 7 V."+ },+ {+ "number": "8",+ "name": "nPGD",+ "type": "output",+ "description": "Open-drain fault status output that indicates a VDS fault when high, with the datasheet recommending the low-state sink current be limited below 5 mA."+ },+ {+ "number": "9",+ "name": "OUT",+ "type": "input",+ "description": "Output voltage sense pin connected to the external MOSFET source, used internally to detect VDS and VGS conditions."+ },+ {+ "number": "10",+ "name": "GATE",+ "type": "output",+ "description": "Gate drive output for the external N-channel MOSFET, charged by a 24 µA typical constant current source and clamped by an internal zener typically 16.8 V above the OUT pin."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Package and ordering confirmed: the orderable addendum (page 34) lists LM5060QDGSRQ1 as VSSOP (DGS),; The package hint says VSSOP-10-0.5mm, but the supplied text does not state the 0.5 mm lead pitch. It; Pin 7 TIMER is labelled I/O in the datasheet and mapped to KiCad bidirectional. Pin 8 nPGD is labell"+ ],+ "pages_sent": 11,+ "cost_usd": 0.07,+ "at": "2026-10-08T00:57:39"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/lm5060-q1",+ "pages": 41,+ "sha256": "38a3fbe1f0f97004",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 10,+ "described": 10,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "lm5060qdgsrq1.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 4.9,+ 3,+ 1.1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "b8f88eac3ce221c2ccb0b5048f9ad49c2ef4af148f8ae50c4e232e357683f547",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "lm5060qdgsrq1-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 4.9,+ 3,+ 1.1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "11fac9b6973cc8646d2473347a58bda1de31de8abf6bac2a6221bf2dd6b0f9a7",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}