component
LM5050Q1MKX-1
Public Made by Adomby adom
Texas Instruments Power Distribution Switches, SOT-23-Thin-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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LM5050Q1MKX-1
Texas Instruments · Power Distribution Switches · SOT-23-Thin-6
LM5050Q1MKX-1 from Texas Instruments, in a SOT-23-Thin-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VS | power_in | The main supply pin for all internal biasing and an auxiliary supply for the internal gate drive charge pump, typically connected to either VOUT or VIN. |
| 2 | GND | power_in | Ground return for the controller. |
| 3 | OFF | input | A logic high state at the OFF pin pulls the GATE pin low and turns off the external MOSFET, and the pin may be left open or connected to GND if unused. |
| 4 | IN | input | Voltage sense connection to the external MOSFET source pin. |
| 5 | GATE | output | Connects to the gate of the external MOSFET and controls it to emulate a low forward-voltage diode. |
| 6 | OUT | output | Voltage sense connection to the external MOSFET drain pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-Thin-6 |
| Category | Power Management (PMIC) |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| IN, OUT, VS pins operating voltage range | 5 | 75 | V | Over operating free-air temperature range | 4 | ||
| OFF pin voltage range | 0 | 5.5 | V | Over operating free-air temperature range | 4 | ||
| Junction temperature LM5050Q1MK-1 | TJ | -40 | 125 | °C | LM5050Q1MK-1 | 4 | |
| IN, OUT pins to ground | -0.3 | 100 | V | Absolute maximum, see note 2 | 4 | ||
| GATE pin to ground | -0.3 | 100 | V | Absolute maximum, see note 2 | 4 | ||
| VS pin to ground | -0.3 | 100 | V | Absolute maximum | 4 | ||
| OFF pin to ground | -0.3 | 7 | V | Absolute maximum | 4 | ||
| Storage temperature | -65 | 150 | °C | Absolute maximum | 4 | ||
| ESD human-body model (AEC-Q100 for -Q1) | V(ESD) | -2000 | 2000 | V | HBM per AEC Q100-002, LM5050-1-Q1 | 4 | |
| ESD machine model | V(ESD) | -150 | 150 | V | MM, LM5050-1-Q1 | 4 | |
| Operating supply voltage range | VVS | 5 | 75 | V | TJ = -40°C to 125°C | 5 | |
| Operating supply current VVS=5V, VIN=5V, VOUT=VIN-100mV | IVS | 105 | µA | VVS=5 V, VIN=5 V, VOUT=VIN-100 mV, TJ = -40°C to 125°C | 5 | ||
| Operating supply current VVS=12V, VIN=12V, VOUT=VIN-100mV | IVS | 147 | µA | VVS=12 V, VIN=12 V, VOUT=VIN-100 mV, TJ = -40°C to 125°C | 5 | ||
| Operating supply current VVS=75V, VIN=75V, VOUT=VIN-100mV | IVS | 288 | µA | VVS=75 V, VIN=75 V, VOUT=VIN-100 mV, TJ = -40°C to 125°C | 5 | ||
| Operating input voltage range | VIN | 5 | 75 | V | TJ = -40°C to 125°C | 5 | |
| IN pin current VIN=5V | IIN | 32 | 305 | µA | VIN = 5 V, VVS=VIN, VOUT=VIN-100 mV, GATE=Open, TJ = -40°C to 125°C | 5 | |
| IN pin current VIN=12V to 75V (LM5050Q1MK-1) | IIN | 233 | 400 | µA | VIN = 12 V to 75 V, VVS=VIN, VOUT=VIN-100 mV, GATE=Open, TJ = -40°C to 125°C | 5 | |
| Gate pin source current VIN=5V | IGATE(ON) | 12 | 41 | µA | VIN = 5 V, VVS=VIN, VGATE=VIN, VOUT=VIN-175 mV, TJ = -40°C to 125°C | 5 | |
| Gate pin source current VIN=12V to 75V | IGATE(ON) | 20 | 41 | µA | VIN = 12 V to 75 V, VVS=VIN, VGATE=VIN, VOUT=VIN-175 mV, TJ = -40°C to 125°C | 5 | |
| VGATE - VIN in forward operation VIN=5V | VGS | 4 | 9 | V | VIN = 5 V, VVS=VIN, VOUT=VIN-175 mV, TJ = -40°C to 125°C | 5 | |
| VGATE - VIN in forward operation VIN=12V to 75V | VGS | 9 | 14 | V | VIN = 12 V to 75 V, VVS=VIN, VOUT=VIN-175 mV, TJ = -40°C to 125°C | 5 | |
| Gate capacitance discharge time at forward to reverse transition | tGATE(REV) | 85 | ns | See Figure 1, CGATE = 0, TJ = -40°C to 125°C | 6 | ||
| Gate capacitance discharge time at forward to reverse transition | tGATE(REV) | 350 | ns | See Figure 1, CGATE = 47 nF, TJ = -40°C to 125°C | 6 | ||
| Gate pin sink current | IGATE(OFF) | 1.8 | A | VGATE = VIN + 3 V, VOUT > VIN + 100 mV, t ≤ 10 ms, TJ = -40°C to 125°C, LM5050Q1MK-1 | 6 | ||
| Reverse VSD threshold | VSD(REV) | -41 | -16 | mV | VIN < VOUT, VIN - VOUT, TJ = -40°C to 125°C | 6 | |
| Regulated forward VSD threshold VIN=5V | VSD(REG) | 1 | 37 | mV | VIN = 5 V, VVS=VIN, VIN - VOUT, TJ = -40°C to 125°C, LM5050Q1MK-1 | 6 | |
| Regulated forward VSD threshold VIN=12V | VSD(REG) | 4.4 | 37 | mV | VIN = 12 V, VVS=VIN, VIN - VOUT, TJ = -40°C to 125°C, LM5050Q1MK-1 | 6 | |
| OFF pin internal pulldown | IOFF | 3 | 7 | µA | VOFF = 4.5 V, TJ = -40°C to 125°C | 6 | |
| Junction-to-ambient thermal resistance | RθJA | 180.7 | °C/W | 4 | |||
| Junction-to-case (top) thermal resistance | RθJC(top) | 41.3 | °C/W | 4 | |||
| Junction-to-board thermal resistance | RθJB | 28.2 | °C/W | 4 | |||
| Junction-to-top characterization parameter | ψJT | 0.7 | °C/W | 4 | |||
| Junction-to-board characterization parameter | ψJB | 27.8 | °C/W | 4 |
CAD (KiCad official)
- Symbol:
LM5050Q1MKX-1 - Footprint:
Package_TO_SOT_SMD:TSOT-23-6 - 3D model: SOT-23-Thin-6 (KiCad packages3D, STEP)
- 3D model files:
lm5050q1mkx-1-etched.step/lm5050q1mkx-1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lm5050q1mkx-1.step/lm5050q1mkx-1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (30 pp, sha256
a19aff0dbd94c07f, retrieved 2026-11-05, tier: manufacturer) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# LM5050Q1MKX-1
**Texas Instruments** · Power Distribution Switches · SOT-23-Thin-6
LM5050Q1MKX-1 from Texas Instruments, in a SOT-23-Thin-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VS | power_in | The main supply pin for all internal biasing and an auxiliary supply for the internal gate drive charge pump, typically connected to either VOUT or VIN. |
| 2 | GND | power_in | Ground return for the controller. |
| 3 | OFF | input | A logic high state at the OFF pin pulls the GATE pin low and turns off the external MOSFET, and the pin may be left open or connected to GND if unused. |
| 4 | IN | input | Voltage sense connection to the external MOSFET source pin. |
| 5 | GATE | output | Connects to the gate of the external MOSFET and controls it to emulate a low forward-voltage diode. |
| 6 | OUT | output | Voltage sense connection to the external MOSFET drain pin. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-Thin-6 |
| Category | Power Management (PMIC) |
| Pins | 6 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| IN, OUT, VS pins operating voltage range | | 5 | | 75 | V | Over operating free-air temperature range | 4 |
| OFF pin voltage range | | 0 | | 5.5 | V | Over operating free-air temperature range | 4 |
| Junction temperature LM5050Q1MK-1 | TJ | -40 | | 125 | °C | LM5050Q1MK-1 | 4 |
| IN, OUT pins to ground | | -0.3 | | 100 | V | Absolute maximum, see note 2 | 4 |
| GATE pin to ground | | -0.3 | | 100 | V | Absolute maximum, see note 2 | 4 |
| VS pin to ground | | -0.3 | | 100 | V | Absolute maximum | 4 |
| OFF pin to ground | | -0.3 | | 7 | V | Absolute maximum | 4 |
| Storage temperature | | -65 | | 150 | °C | Absolute maximum | 4 |
| ESD human-body model (AEC-Q100 for -Q1) | V(ESD) | -2000 | | 2000 | V | HBM per AEC Q100-002, LM5050-1-Q1 | 4 |
| ESD machine model | V(ESD) | -150 | | 150 | V | MM, LM5050-1-Q1 | 4 |
| Operating supply voltage range | VVS | 5 | | 75 | V | TJ = -40°C to 125°C | 5 |
| Operating supply current VVS=5V, VIN=5V, VOUT=VIN-100mV | IVS | | | 105 | µA | VVS=5 V, VIN=5 V, VOUT=VIN-100 mV, TJ = -40°C to 125°C | 5 |
| Operating supply current VVS=12V, VIN=12V, VOUT=VIN-100mV | IVS | | | 147 | µA | VVS=12 V, VIN=12 V, VOUT=VIN-100 mV, TJ = -40°C to 125°C | 5 |
| Operating supply current VVS=75V, VIN=75V, VOUT=VIN-100mV | IVS | | | 288 | µA | VVS=75 V, VIN=75 V, VOUT=VIN-100 mV, TJ = -40°C to 125°C | 5 |
| Operating input voltage range | VIN | 5 | | 75 | V | TJ = -40°C to 125°C | 5 |
| IN pin current VIN=5V | IIN | 32 | | 305 | µA | VIN = 5 V, VVS=VIN, VOUT=VIN-100 mV, GATE=Open, TJ = -40°C to 125°C | 5 |
| IN pin current VIN=12V to 75V (LM5050Q1MK-1) | IIN | 233 | | 400 | µA | VIN = 12 V to 75 V, VVS=VIN, VOUT=VIN-100 mV, GATE=Open, TJ = -40°C to 125°C | 5 |
| Gate pin source current VIN=5V | IGATE(ON) | 12 | | 41 | µA | VIN = 5 V, VVS=VIN, VGATE=VIN, VOUT=VIN-175 mV, TJ = -40°C to 125°C | 5 |
| Gate pin source current VIN=12V to 75V | IGATE(ON) | 20 | | 41 | µA | VIN = 12 V to 75 V, VVS=VIN, VGATE=VIN, VOUT=VIN-175 mV, TJ = -40°C to 125°C | 5 |
| VGATE - VIN in forward operation VIN=5V | VGS | 4 | | 9 | V | VIN = 5 V, VVS=VIN, VOUT=VIN-175 mV, TJ = -40°C to 125°C | 5 |
| VGATE - VIN in forward operation VIN=12V to 75V | VGS | 9 | | 14 | V | VIN = 12 V to 75 V, VVS=VIN, VOUT=VIN-175 mV, TJ = -40°C to 125°C | 5 |
| Gate capacitance discharge time at forward to reverse transition | tGATE(REV) | | | 85 | ns | See Figure 1, CGATE = 0, TJ = -40°C to 125°C | 6 |
| Gate capacitance discharge time at forward to reverse transition | tGATE(REV) | | | 350 | ns | See Figure 1, CGATE = 47 nF, TJ = -40°C to 125°C | 6 |
| Gate pin sink current | IGATE(OFF) | 1.8 | | | A | VGATE = VIN + 3 V, VOUT > VIN + 100 mV, t ≤ 10 ms, TJ = -40°C to 125°C, LM5050Q1MK-1 | 6 |
| Reverse VSD threshold | VSD(REV) | -41 | | -16 | mV | VIN < VOUT, VIN - VOUT, TJ = -40°C to 125°C | 6 |
| Regulated forward VSD threshold VIN=5V | VSD(REG) | 1 | | 37 | mV | VIN = 5 V, VVS=VIN, VIN - VOUT, TJ = -40°C to 125°C, LM5050Q1MK-1 | 6 |
| Regulated forward VSD threshold VIN=12V | VSD(REG) | 4.4 | | 37 | mV | VIN = 12 V, VVS=VIN, VIN - VOUT, TJ = -40°C to 125°C, LM5050Q1MK-1 | 6 |
| OFF pin internal pulldown | IOFF | 3 | | 7 | µA | VOFF = 4.5 V, TJ = -40°C to 125°C | 6 |
| Junction-to-ambient thermal resistance | RθJA | | 180.7 | | °C/W | | 4 |
| Junction-to-case (top) thermal resistance | RθJC(top) | | 41.3 | | °C/W | | 4 |
| Junction-to-board thermal resistance | RθJB | | 28.2 | | °C/W | | 4 |
| Junction-to-top characterization parameter | ψJT | | 0.7 | | °C/W | | 4 |
| Junction-to-board characterization parameter | ψJB | | 27.8 | | °C/W | | 4 |
## CAD (KiCad official)
- Symbol: `LM5050Q1MKX-1`
- Footprint: `Package_TO_SOT_SMD:TSOT-23-6`
- 3D model: SOT-23-Thin-6 (KiCad packages3D, STEP)
- 3D model files: `lm5050q1mkx-1-etched.step` / `lm5050q1mkx-1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lm5050q1mkx-1.step` / `lm5050q1mkx-1.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/lm5050-1-q1) (30 pp, sha256 `a19aff0dbd94c07f`, retrieved 2026-11-05, tier: manufacturer)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/lm5050q1mkx-1-datasheet.pdf)