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Contents

README

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LM5025BMTCX

Texas Instruments · AC-DC Controllers And Regulators · TSSOP-16

LM5025BMTCX from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Input to the start-up regulator with an input range of 13V to 100V and transient capability to 105V.
2 RAMP input An external RC network from VIN sets the ramp slope, and the pin is discharged at the end of each cycle by an internal FET initiated by the internal clock or the V*Sec clamp comparator.
3 CS1 input Cycle-by-cycle current-limit input that puts the outputs into cycle-by-cycle limit when CS1 exceeds 0.25V and is held low for 50ns after OUT_A switches high for leading-edge blanking.
4 CS2 input Soft-restart current-sense input that disables the outputs and starts a soft start when CS2 exceeds 0.5V.
5 TIME input An RSET resistor from TIME to GND produces in-phase OUT_A and OUT_B pulses with overlap, while an RSET resistor from TIME to REF produces out-of-phase pulses with deadtime.
6 REF power_out Precision 5V reference output with a maximum output current of 10mA, to be locally decoupled with a 0.1µF capacitor, and it stays low until the VCC UV comparator and line UVLO comparator are satisfied.
7 VCC power_out Output of the internal high-voltage start-up regulator, regulated to 7.6V, which shuts down when an auxiliary winding raises the pin above the regulation setpoint.
8 OUT_A output Main switch PWM gate-driver output with 3A peak sink current capability.
9 OUT_B output Active clamp switch gate-driver output with 1.25A peak sink current capability.
10 PGND power_in Power ground that the datasheet says to connect directly to analog ground.
11 AGND power_in Analog ground that the datasheet says to connect directly to power ground.
12 SS passive An external capacitor and an internal 20µA current source set the soft-start ramp, which is reduced to 1µA following a CS2 over-current or over-temperature event.
13 COMP input PWM duty cycle is controlled by the COMP voltage, which is reduced by a fixed 1V offset before comparison with the RAMP pin signal.
14 RT passive An external timing resistor connected from RT to ground sets the internal oscillator frequency.
15 SYNC input Oscillator up/down synchronization input that accepts an external clock 20% lower than the free-running frequency, with no constraint on the maximum sync frequency.
16 UVLO input Line under-voltage shutdown input with a 2.5V comparator threshold and hysteresis set by a 20µA internal current source switched as the pin crosses 2.5V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category Power Management (PMIC)
Pins 16

CAD (KiCad official)

  • Symbol: LM5025BMTCX
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: lm5025bmtcx-etched.step / lm5025bmtcx-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lm5025bmtcx.step / lm5025bmtcx.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (25 pp, sha256 9229c103b4e628b5, retrieved 2026-10-11, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF