component

LM5019MRX

Public Made by Adom

by adom

Texas Instruments DC-DC Converters, SO-8-EP. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
Name Last commit message Last updated
docs lm5019mrx: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
lm5019mrx-etched.fit.json lm5019mrx: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
lm5019mrx-etched.glb lm5019mrx: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
lm5019mrx-etched.step lm5019mrx: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
lm5019mrx.glb Publish 0.1.0 · Ray
lm5019mrx.kicad_mod footprint + symbol: give this part its thermal pad. It shipped SOIC-8_3.9x4.9mm_P1.27mm, which has no exposed pad at al… · Ray
lm5019mrx.kicad_sym footprint + symbol: give this part its thermal pad. It shipped SOIC-8_3.9x4.9mm_P1.27mm, which has no exposed pad at al… · Ray
lm5019mrx.lbr footprint + symbol: give this part its thermal pad. It shipped SOIC-8_3.9x4.9mm_P1.27mm, which has no exposed pad at al… · Ray
lm5019mrx.step Publish 0.1.0 · Ray
package.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
pads.json footprint + symbol: give this part its thermal pad. It shipped SOIC-8_3.9x4.9mm_P1.27mm, which has no exposed pad at al… · Ray
page.json lm5019mrx: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md lm5019mrx: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray

LM5019MRX

Texas Instruments · DC-DC Converters · SO-8-EP

LM5019MRX from Texas Instruments, in a SO-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RTN power_in Ground return of the integrated circuit. Also the reference for all internal analog and power domains. The exposed pad must be tied to this pin.
2 VIN power_in Input supply pin. Operating input voltage range is 7.5 V to 100 V. Feeds the internal high-voltage startup regulator and the high-side power MOSFET.
3 UVLO input Input to the undervoltage lockout comparator. A resistor divider from VIN sets the UVLO threshold; an internal current source provides programmable hysteresis when UVLO > 1.225 V. Pulling UVLO below 0.66 V forces shutdown.
4 RON input On-time programming pin. A resistor from RON to VIN sets the high-side switch on-time as a function of VIN, giving nearly constant switching frequency. Minimum recommended on-time is 100 ns at maximum VIN.
5 FB input Feedback pin, connected to the inverting input of the internal regulation comparator. Internal reference is 1.225 V; set output voltage with an external divider from VOUT to FB to RTN.
6 VCC power_out Output of the internal high-voltage series pass regulator, regulated at 7.6 V. Provides bias for the gate drivers and internal circuitry. Bypass with a 1.0-uF ceramic capacitor to RTN.
7 BST power_in Bootstrap capacitor pin for the high-side gate driver. Connect a 0.01-uF ceramic capacitor between BST and SW. The BST capacitor is refreshed from VCC through an internal diode while SW is low.
8 SW output Switching node between the integrated high-side and low-side power MOSFETs. Connect to the output inductor and to the bottom plate of the bootstrap capacitor. Absolute max SW to RTN is -1.5 V (steady) / -5 V (100-ns transient).
EP EP power_in Exposed thermal pad on the underside of the package. Must be electrically connected to the RTN pin and tied to the system ground plane for reduced thermal resistance.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SO-8-EP
Category PMIC
Pins 9

Ordering variants

Same part, different packaging or reel option.

  • LM5019MRX
  • LM5019MRXSD
  • LM5019MRXSDX

CAD (KiCad official)

  • Symbol: LM5019MRX
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8-EP (KiCad packages3D, STEP)
  • 3D model files: lm5019mrx-etched.step / lm5019mrx-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lm5019mrx.step / lm5019mrx.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (35 pp, sha256 994feed72dee9bcb, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF