component
LM46002AQPWPTQ1
Public Made by Adomby adom
Texas Instruments DC-DC Converters, HTSSOP-16-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"component": {
"mpn": "LM46002AQPWPTQ1",
"manufacturer": "Texas Instruments",
"package": "HTSSOP-16-EP",
"pin_count": 17,
"category": "Power Supply Chip",
"subcategory": "DC-DC Converters",
"datasheet": "https://www.ti.com/cn/lit/gpn/lm46002-q1",
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"lcsc": "C2070845",
"digikey": "296-47097-2-ND",
"mouser": "595-LM46002AQPWPTQ1"
},
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"checked_at": "2026-10-08T20:46:34Z",
"source": "Component Ocean /api/assign-pns",
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"pn": "296-47097-2-ND",
"status": "found",
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"pins": [
{
"number": "1",
"name": "SW",
"type": "power_out",
"description": "Switching output of the regulator, internally connected to both power MOSFETs, and connected to the power inductor."
},
{
"number": "2",
"name": "SW",
"type": "power_out",
"description": "Switching output of the regulator, internally connected to both power MOSFETs, and connected to the power inductor."
},
{
"number": "3",
"name": "CBOOT",
"type": "power_out",
"description": "Bootstrap capacitor connection for the high-side driver; connect a high-quality 470-nF capacitor from CBOOT to SW."
},
{
"number": "4",
"name": "VCC",
"type": "power_out",
"description": "Internal bias supply output for bypassing; connect a bypass capacitor to AGND, do not connect an external load, and never short it to ground during operation."
},
{
"number": "5",
"name": "BIAS",
"type": "power_in",
"description": "Optional internal LDO supply input: tie to VOUT when 3.3 V ≤ VOUT ≤ 28 V (or to an external 3.3-V or 5-V rail), with a 1 to 10 µF bypass capacitor to ground, and tie to ground when not used."
},
{
"number": "6",
"name": "SYNC",
"type": "input",
"description": "Clock input to synchronize switching to an external clock, which requires proper high-speed termination to prevent ringing, and connect to ground if not used."
},
{
"number": "7",
"name": "RT",
"type": "passive",
"description": "Connect a resistor RT from this pin to AGND to program the switching frequency, or leave floating for the 500-kHz default."
},
{
"number": "8",
"name": "PGOOD",
"type": "output",
"description": "Open-drain power-good flag output that requires a 10-kΩ to 100-kΩ pullup to a logic rail or DC voltage no higher than 12 V."
},
{
"number": "9",
"name": "FB",
"type": "input",
"description": "Feedback sense input connected to the midpoint of the feedback divider to set VOUT, and must not be shorted to ground during operation."
},
{
"number": "10",
"name": "AGND",
"type": "power_in",
"description": "Analog ground and ground reference for internal references and logic, to be connected to system ground."
},
{
"number": "11",
"name": "SS/TRK",
"type": "passive",
"description": "Soft-start control pin: leave floating for internal soft-start slew rate, connect a capacitor to extend soft-start time, or connect an external voltage ramp for tracking."
},
{
"number": "12",
"name": "EN",
"type": "input",
"description": "Enable input where high turns the device ON and low turns it OFF, connected to VIN, a resistor divider, or an external voltage or logic source, and must not float."
},
{
"number": "13",
"name": "VIN",
"type": "power_in",
"description": "Supply input to the internal LDO and high-side power FET, connected to the power supply and bypass capacitor CIN with the VIN-to-CIN-to-PGND path kept as short as possible."
},
{
"number": "14",
"name": "VIN",
"type": "power_in",
"description": "Supply input to the internal LDO and high-side power FET, connected to the power supply and bypass capacitor CIN with the VIN-to-CIN-to-PGND path kept as short as possible."
},
{
"number": "15",
"name": "PGND",
"type": "power_in",
"description": "Power ground connected internally to the low-side power FET, to be connected to system ground, PAD, AGND, and the grounds of CIN and COUT with a short path to CIN."
},
{
"number": "16",
"name": "PGND",
"type": "power_in",
"description": "Power ground connected internally to the low-side power FET, to be connected to system ground, PAD, AGND, and the grounds of CIN and COUT with a short path to CIN."
},
{
"number": "17",
"name": "PAD",
"type": "passive",
"description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
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"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The exposed thermal pad is listed in the datasheet pin table (page 3) with no printed pin number, so; Pin types are KiCad ERC classes mapped from the datasheet's P/G/A/I-O column; SW, CBOOT and VCC are ",
"exposed pad 17 added from the footprint",
"dropped thermal pad ['EP'] absent from footprint"
],
"pages_sent": 7,
"cost_usd": 0.058,
"at": "2026-10-08T20:45:57"
},
"datasheet": {
"url": "https://www.ti.com/cn/lit/gpn/lm46002-q1",
"pages": 51,
"sha256": "c18503df0395799f",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
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"described": 17,
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