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Initial commit: component/lm46001pwpr

Ray ·f9b3773559 ·22h ago
2 files changed +266
README.mdadded+54
@@ -0,0 +1,54 @@+# LM46001PWPR++**Texas Instruments** · DC-DC Converters · HTSSOP-16-EP++LM46001PWPR from Texas Instruments, in a HTSSOP-16-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | SW | output | Switching output of regulator internally connected to both power MOSFETs and connected to power inductor. |+| 2 | SW | output | Switching output of regulator internally connected to both power MOSFETs and connected to power inductor. |+| 3 | CBOOT | power_out | Bootstrap capacitor connection for high-side driver requiring 470-nF capacitor connection from CBOOT to SW. |+| 4 | VCC | power_out | Internal bias supply output for bypassing with bypass capacitor to AGND; do not connect external load or short to ground during operation. |+| 5 | BIAS | power_in | Optional internal LDO supply input tied to VOUT (3.3 V to 28 V) or external 3.3 V/5 V rail with 1-10 µF bypass capacitor, or to ground if VOUT < 3.3 V; do not float. |+| 6 | SYNC | input | Clock input to synchronize switching action to external clock with proper high-speed termination; connect to ground if not used; do not float. |+| 7 | RT | input | Resistor connection to AGND to program switching frequency; leave floating for 500 kHz default switching frequency. |+| 8 | PGOOD | output | Open-drain power-good flag output requiring 10-kΩ to 100-kΩ pullup resistor to logic rail or DC voltage not exceeding 12 V. |+| 9 | FB | input | Feedback sense input connected to midpoint of feedback divider to set VOUT; do not short to ground during operation. |+| 10 | AGND | power_in | Analog ground pin serving as ground reference for internal references and logic. |+| 11 | SS/TRK | input | Soft-start control pin left floating for internal soft-start, or connected to capacitor to extend soft-start time, or connected to external voltage ramp for tracking. |+| 12 | EN | input | Enable input with High = ON and Low = OFF logic; connect to VIN, VIN through resistor divider, or external voltage/logic source; do not float. |+| 13 | VIN | power_in | Supply input pin to internal LDO and high-side power FET; connect to power supply and bypass capacitors CIN with path from VIN to high-frequency bypass CIN and PGND kept as short as possible. |+| 14 | VIN | power_in | Supply input pin to internal LDO and high-side power FET; connect to power supply and bypass capacitors CIN with path from VIN to high-frequency bypass CIN and PGND kept as short as possible. |+| 15 | PGND | power_in | Power ground pin connected internally to low-side power FET; connect to system ground, PAD, AGND, and ground pins of CIN and COUT with path to CIN kept as short as possible. |+| 16 | PGND | power_in | Power ground pin connected internally to low-side power FET; connect to system ground, PAD, AGND, and ground pins of CIN and COUT with path to CIN kept as short as possible. |+| 17 | PAD | power_in | Low-impedance connection to AGND serving as major heat dissipation path of die; must be used for heat sinking to ground plane on PCB. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | HTSSOP-16-EP |+| Category | Power Management (PMIC) |+| Pins | 17 |++## CAD (KiCad official)++- Symbol: `LM46001PWPR`+- Footprint: `Package_SO:TSSOP-16-1EP_4.4x5mm_P0.65mm`+- 3D model: HTSSOP-16-EP (KiCad packages3D, STEP)+- 3D model files: `lm46001pwpr-etched.step` / `lm46001pwpr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lm46001pwpr.step` / `lm46001pwpr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/lm46001) (55 pp, sha256 `03496a33574d38df`, retrieved 2026-10-05, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/lm46001pwpr-datasheet.pdf)
page.jsonadded+212
@@ -0,0 +1,212 @@+{+  "slug": "lm46001pwpr",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments DC-DC Converters, HTSSOP-16-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "power management (pmic)",+    "lm46001pwpr",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "lm46001pwpr.kicad_sym",+    "lm46001pwpr.kicad_mod",+    "lm46001pwpr.glb",+    "lm46001pwpr.step",+    "lm46001pwpr.lbr",+    "docs/hero.png",+    "docs/lm46001pwpr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "lm46001pwpr-hero.glb",+    "lm46001pwpr-hero.overlay.json"+  ],+  "component": {+    "mpn": "LM46001PWPR",+    "manufacturer": "Texas Instruments",+    "package": "HTSSOP-16-EP",+    "pin_count": 17,+    "category": "Power Management (PMIC)",+    "subcategory": "DC-DC Converters",+    "datasheet": "https://www.ti.com/cn/lit/gpn/lm46001",+    "parts": {+      "symbol": "lm46001pwpr.kicad_sym",+      "footprint": "lm46001pwpr.kicad_mod",+      "model_3d": "lm46001pwpr-hero.glb",+      "model_3d_plain": "lm46001pwpr.glb",+      "model_3d_step": "lm46001pwpr-etched.step",+      "model_3d_step_plain": "lm46001pwpr.step",+      "lbr": "lm46001pwpr.lbr"+    },+    "distributor_links": {+      "lcsc": 116574,+      "digikey": "296-40223-2-ND",+      "mouser": "595-LM46001PWPR"+    },+    "distributor_check": {+      "checked_at": "2026-10-05T21:29:45Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "296-40223-2-ND",+        "status": "found",+        "lifecycle": "Active"+      },+      "mouser": {+        "pn": "595-LM46001PWPR",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "SW",+        "type": "output",+        "description": "Switching output of regulator internally connected to both power MOSFETs and connected to power inductor."+      },+      {+        "number": "2",+        "name": "SW",+        "type": "output",+        "description": "Switching output of regulator internally connected to both power MOSFETs and connected to power inductor."+      },+      {+        "number": "3",+        "name": "CBOOT",+        "type": "power_out",+        "description": "Bootstrap capacitor connection for high-side driver requiring 470-nF capacitor connection from CBOOT to SW."+      },+      {+        "number": "4",+        "name": "VCC",+        "type": "power_out",+        "description": "Internal bias supply output for bypassing with bypass capacitor to AGND; do not connect external load or short to ground during operation."+      },+      {+        "number": "5",+        "name": "BIAS",+        "type": "power_in",+        "description": "Optional internal LDO supply input tied to VOUT (3.3 V to 28 V) or external 3.3 V/5 V rail with 1-10 µF bypass capacitor, or to ground if VOUT < 3.3 V; do not float."+      },+      {+        "number": "6",+        "name": "SYNC",+        "type": "input",+        "description": "Clock input to synchronize switching action to external clock with proper high-speed termination; connect to ground if not used; do not float."+      },+      {+        "number": "7",+        "name": "RT",+        "type": "input",+        "description": "Resistor connection to AGND to program switching frequency; leave floating for 500 kHz default switching frequency."+      },+      {+        "number": "8",+        "name": "PGOOD",+        "type": "output",+        "description": "Open-drain power-good flag output requiring 10-kΩ to 100-kΩ pullup resistor to logic rail or DC voltage not exceeding 12 V."+      },+      {+        "number": "9",+        "name": "FB",+        "type": "input",+        "description": "Feedback sense input connected to midpoint of feedback divider to set VOUT; do not short to ground during operation."+      },+      {+        "number": "10",+        "name": "AGND",+        "type": "power_in",+        "description": "Analog ground pin serving as ground reference for internal references and logic."+      },+      {+        "number": "11",+        "name": "SS/TRK",+        "type": "input",+        "description": "Soft-start control pin left floating for internal soft-start, or connected to capacitor to extend soft-start time, or connected to external voltage ramp for tracking."+      },+      {+        "number": "12",+        "name": "EN",+        "type": "input",+        "description": "Enable input with High = ON and Low = OFF logic; connect to VIN, VIN through resistor divider, or external voltage/logic source; do not float."+      },+      {+        "number": "13",+        "name": "VIN",+        "type": "power_in",+        "description": "Supply input pin to internal LDO and high-side power FET; connect to power supply and bypass capacitors CIN with path from VIN to high-frequency bypass CIN and PGND kept as short as possible."+      },+      {+        "number": "14",+        "name": "VIN",+        "type": "power_in",+        "description": "Supply input pin to internal LDO and high-side power FET; connect to power supply and bypass capacitors CIN with path from VIN to high-frequency bypass CIN and PGND kept as short as possible."+      },+      {+        "number": "15",+        "name": "PGND",+        "type": "power_in",+        "description": "Power ground pin connected internally to low-side power FET; connect to system ground, PAD, AGND, and ground pins of CIN and COUT with path to CIN kept as short as possible."+      },+      {+        "number": "16",+        "name": "PGND",+        "type": "power_in",+        "description": "Power ground pin connected internally to low-side power FET; connect to system ground, PAD, AGND, and ground pins of CIN and COUT with path to CIN kept as short as possible."+      },+      {+        "number": "17",+        "name": "PAD",+        "type": "power_in",+        "description": "Low-impedance connection to AGND serving as major heat dissipation path of die; must be used for heat sinking to ground plane on PCB."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [],+        "pages_sent": 7,+        "cost_usd": 0.1433,+        "at": "2026-10-05T21:29:29"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/lm46001",+        "pages": 55,+        "sha256": "03496a33574d38df",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 17,+        "described": 17,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file