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LM46000AQPWPRQ1

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Texas Instruments DC-DC Converters, HTSSOP-16-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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LM46000AQPWPRQ1

Texas Instruments · DC-DC Converters · HTSSOP-16-EP

LM46000AQPWPRQ1 from Texas Instruments, in a HTSSOP-16-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SW power_out Switching output of the regulator, internally connected to both power MOSFETs, to be connected to the power inductor.
2 SW power_out Switching output of the regulator, internally connected to both power MOSFETs, to be connected to the power inductor.
3 CBOOT power_out Bootstrap capacitor connection for the high-side driver; connect a high-quality 470-nF capacitor from CBOOT to SW.
4 VCC power_out Internal bias supply output for bypassing to AGND; do not connect an external load and never short this pin to ground during operation.
5 BIAS power_in Optional internal LDO supply input; TI recommends tying to VOUT for 3.3 V ≤ VOUT ≤ 28 V, tie to ground when not in use (VOUT < 3.3 V), and do not float.
6 SYNC input Clock input to synchronize switching to an external clock; use proper high-speed termination, connect to ground if not used, and do not float.
7 RT passive Connect resistor RT from this pin to AGND to program the switching frequency; leave floating for the 500-kHz default.
8 PGOOD output Open-drain power-good flag output; use a 10-kΩ to 100-kΩ pullup to a logic rail or DC voltage no higher than 12 V.
9 FB input Feedback sense input connected to the feedback divider midpoint to set VOUT; do not short this pin to ground during operation.
10 AGND power_in Analog ground pin, the ground reference for internal references and logic; connect to system ground.
11 SS/TRK input Soft-start control pin; leave floating for internal soft-start slew rate, connect a capacitor to extend soft-start time, or connect an external voltage ramp for tracking.
12 EN input Enable input: high = ON and low = OFF; connect to VIN, a resistor divider, or an external voltage or logic source and do not float.
13 VIN power_in Supply input to the internal LDO and high-side power FET; place the high-frequency bypass CIN as close as possible to VIN and PGND.
14 VIN power_in Supply input to the internal LDO and high-side power FET; place the high-frequency bypass CIN as close as possible to VIN and PGND.
15 PGND power_in Power ground pin connected internally to the low-side power FET; connect to system ground, PAD, AGND, and the ground pins of CIN and COUT.
16 PGND power_in Power ground pin connected internally to the low-side power FET; connect to system ground, PAD, AGND, and the ground pins of CIN and COUT.
17 PAD passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package HTSSOP-16-EP
Category Power Supply Chip
Pins 17

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VIN to PGND -0.3 65 V 4
EN to PGND -0.3 V 4
FB, RT, SS/TRK to AGND -0.3 3.6 V 4
PGOOD to AGND -0.3 15 V 4
SYNC to AGND -0.3 5.5 V 4
BIAS to AGND -0.3 30 V 4
AGND to PGND -0.3 0.3 V 4
SW to PGND -0.3 V 4
SW to PGND less than 10-ns transients -3.5 65 V 4
CBOOT to SW -0.3 5.5 V 4
VCC to AGND -0.3 3.6 V 4
Storage temperature range Tstg -65 150 °C 4
VIN to PGND 3.5 60 V 4
EN -0.3 V 4
FB -0.3 1.1 V 4
PGOOD -0.3 12 V 4
BIAS input not used -0.3 0.3 V 4
BIAS input used 3.3 28 V 4
AGND to PGND -0.1 0.1 V 4
Output voltage VOUT 1 28 V 4
Output current IOUT 0 0.5 A 4
Operating junction temperature range TJ -40 125 °C 4
ISHDN Shutdown quiescent current ISHDN 2.3 5 µA VEN = 0 V 5
Operating quiescent current (non-switching) from VIN IQ-NONSW 7 13 µA VEN = 3.3 V; VFB = 1.5 V; VBIAS = 3.4 V external 5
Operating quiescent current (non-switching) from external VBIAS IBIAS-NONSW 85 140 µA VEN = 3.3 V; VFB = 1.5 V; VBIAS = 3.4 V external 5
Enable input leakage current ILKG-EN 0.8 1.75 µA VEN = 3.3 V 5
Precision enable level for switching and regulator output VOUT (rising) VEN-VOUT-H 2 2.1 2.42 V VENABLE high level 5
Internal LDO input change over threshold to BIAS (VBIAS rising threshold) VBIAS-ON 2.96 3.2 V 5
Feedback voltage, TJ = 25°C VFB 1.009 1.016 1.023 V TJ = 25°C 6
Feedback voltage, TJ = –40°C to 125°C VFB 0.999 1.016 1.039 V TJ = –40°C to 125°C 6
Input leakage current at FB pin ILKG-FB 0.2 65 nA FB = 1.016 V 6
Peak inductor current limit IHS-LIMIT 1.05 1.35 1.56 A 6
Valley inductor current limit ILS-LIMIT 0.46 0.6 0.75 A 6
Soft-start charge current ISSC 1.17 2.2 2.85 µA 6
Power-good flag overvoltage tripping threshold (% of FB voltage) VPGOOD-HIGH 110 113 % 6
Power-good flag undervoltage tripping threshold (% of FB voltage) VPGOOD-LOW 83 90 % 6
PGOOD pin pulldown resistance when power bad RPGOOD 69 150 Ω LM46000A-Q1: VEN = 3.3 V 6
PGOOD pin pulldown resistance when power bad RPGOOD 150 350 Ω LM46000A-Q1: VEN = 0 V 6
Minimum high side MOSFET ON-time tON-MIN 125 165 ns 7
Minimum high side MOSFET OFF-time tOFF-MIN 200 250 ns 7
Oscillator default frequency FOSC-DEFAULT 445 500 570 kHz RT pin open circuit 7
Operating junction temperature range thermal resistance, junction-to-ambient (PWP HTSSOP 16 pins) RθJA 39.9 °C/W JESD 51-7, 4-layer board, 1 W 5
Junction-to-case (top) thermal resistance RθJC(top) 26.9 °C/W 5
Junction-to-board thermal resistance RθJB 21.7 °C/W 5
Junction-to-top characterization parameter ψJT 0.8 °C/W 5
Junction-to-board characterization parameter ψJB 21.5 °C/W 5
Junction-to-case (bottom) thermal resistance RθJC(bot) 2.3 °C/W 5

CAD (KiCad official)

  • Symbol: LM46000AQPWPRQ1
  • Footprint: Package_SO:TSSOP-16-1EP_4.4x5mm_P0.65mm
  • 3D model: HTSSOP-16-EP (KiCad packages3D, STEP)
  • 3D model files: lm46000aqpwprq1-etched.step / lm46000aqpwprq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lm46000aqpwprq1.step / lm46000aqpwprq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (51 pp, sha256 a13bf07fe8ea5724, retrieved 2026-10-11, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF