component
LM43603PWPR
Public Made by Adomby adom
Texas Instruments DC-DC Converters, TSSOP-16-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+54@@ -0,0 +1,54 @@+# LM43603PWPR++**Texas Instruments** · DC-DC Converters · TSSOP-16-EP++LM43603PWPR from Texas Instruments, in a TSSOP-16-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | SW | output | Switching output of the regulator, internally connected to both power MOSFETs; connect to power inductor. |+| 2 | SW | output | Switching output of the regulator, internally connected to both power MOSFETs; connect to power inductor. |+| 3 | CBOOT | output | Bootstrap capacitor connection for high-side driver; connect 470-nF capacitor from CBOOT to SW. |+| 4 | VCC | power_out | Internal bias supply output for bypassing, 3.28V typical; connect bypass capacitor from this pin to AGND; do not connect external loading or short to ground during operation. |+| 5 | BIAS | power_in | Optional internal LDO supply input (3.3V to 28V); tie to VOUT when 3.3V ≤ VOUT ≤ 28V or to external 3.3V/5V rail; place 1-10µF bypass capacitor when used, tie to ground when not in use; do not float. |+| 6 | SYNC | input | Clock input to synchronize switching action to external clock from 200kHz to 2.2MHz; use proper high-speed termination; connect to ground if not used; do not float. |+| 7 | RT | input | Frequency programming input; connect resistor from this pin to AGND to program switching frequency (200kHz to 2.2MHz) or leave floating for 500kHz default. |+| 8 | PGOOD | tri_state | Open-drain power-good flag output; use 10kΩ to 100kΩ pullup resistor to logic rail no higher than 12V; provides 220µs deglitch delay. |+| 9 | FB | input | Feedback sense input pin; connect to midpoint of feedback divider to set VOUT; reference voltage 1.011V typical; do not short this pin to ground during operation. |+| 10 | AGND | power_in | Analog ground pin serving as ground reference for internal references and logic; connect to system ground. |+| 11 | SS/TRK | input | Soft-start control pin; leave floating for 4.1ms internal soft-start or connect capacitor to extend soft-start time; can connect external voltage ramp for output voltage tracking. |+| 12 | EN | input | Enable input to internal LDO and regulator; high enables operation and low disables; connect to VIN, resistor divider, or external voltage/logic source; do not float; 2.1V typical enable threshold. |+| 13 | VIN | power_in | Supply input pins to internal LDO and high-side power FET, 3.5V to 36V range; connect to power supply and bypass capacitors CIN; maintain short path to high-frequency bypass capacitor and PGND. |+| 14 | VIN | power_in | Supply input pins to internal LDO and high-side power FET, 3.5V to 36V range; connect to power supply and bypass capacitors CIN; maintain short path to high-frequency bypass capacitor and PGND. |+| 15 | PGND | power_in | Power ground pins connected internally to low-side power FET; connect to system ground, PAD, AGND, and ground pins of input/output capacitors; maintain short path to CIN. |+| 16 | PGND | power_in | Power ground pins connected internally to low-side power FET; connect to system ground, PAD, AGND, and ground pins of input/output capacitors; maintain short path to CIN. |+| 17 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | TSSOP-16-EP |+| Category | Power Management (PMIC) |+| Pins | 17 |++## CAD (KiCad official)++- Symbol: `LM43603PWPR`+- Footprint: `Package_SO:TSSOP-16-1EP_4.4x5mm_P0.65mm`+- 3D model: TSSOP-16-EP (KiCad packages3D, STEP)+- 3D model files: `lm43603pwpr-etched.step` / `lm43603pwpr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lm43603pwpr.step` / `lm43603pwpr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/lm43603) (59 pp, sha256 `2642edca40e62388`, retrieved 2026-09-23, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/lm43603pwpr-datasheet.pdf)
page.jsonadded+198@@ -0,0 +1,198 @@+{+ "slug": "lm43603pwpr",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments DC-DC Converters, TSSOP-16-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "lm43603pwpr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "lm43603pwpr.kicad_sym",+ "lm43603pwpr.kicad_mod",+ "lm43603pwpr.glb",+ "lm43603pwpr.step",+ "lm43603pwpr.lbr",+ "docs/hero.png",+ "docs/lm43603pwpr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "LM43603PWPR",+ "manufacturer": "Texas Instruments",+ "package": "TSSOP-16-EP",+ "pin_count": 17,+ "category": "Power Management (PMIC)",+ "subcategory": "DC-DC Converters",+ "datasheet": "https://www.ti.com/cn/lit/gpn/lm43603",+ "parts": {+ "symbol": "lm43603pwpr.kicad_sym",+ "footprint": "lm43603pwpr.kicad_mod",+ "model_3d": "lm43603pwpr-etched.glb",+ "model_3d_plain": "lm43603pwpr.glb",+ "model_3d_step": "lm43603pwpr-etched.step",+ "model_3d_step_plain": "lm43603pwpr.step",+ "lbr": "lm43603pwpr.lbr"+ },+ "distributor_links": {+ "lcsc": "C412826"+ },+ "pins": [+ {+ "number": "1",+ "name": "SW",+ "type": "output",+ "description": "Switching output of the regulator, internally connected to both power MOSFETs; connect to power inductor."+ },+ {+ "number": "2",+ "name": "SW",+ "type": "output",+ "description": "Switching output of the regulator, internally connected to both power MOSFETs; connect to power inductor."+ },+ {+ "number": "3",+ "name": "CBOOT",+ "type": "output",+ "description": "Bootstrap capacitor connection for high-side driver; connect 470-nF capacitor from CBOOT to SW."+ },+ {+ "number": "4",+ "name": "VCC",+ "type": "power_out",+ "description": "Internal bias supply output for bypassing, 3.28V typical; connect bypass capacitor from this pin to AGND; do not connect external loading or short to ground during operation."+ },+ {+ "number": "5",+ "name": "BIAS",+ "type": "power_in",+ "description": "Optional internal LDO supply input (3.3V to 28V); tie to VOUT when 3.3V ≤ VOUT ≤ 28V or to external 3.3V/5V rail; place 1-10µF bypass capacitor when used, tie to ground when not in use; do not float."+ },+ {+ "number": "6",+ "name": "SYNC",+ "type": "input",+ "description": "Clock input to synchronize switching action to external clock from 200kHz to 2.2MHz; use proper high-speed termination; connect to ground if not used; do not float."+ },+ {+ "number": "7",+ "name": "RT",+ "type": "input",+ "description": "Frequency programming input; connect resistor from this pin to AGND to program switching frequency (200kHz to 2.2MHz) or leave floating for 500kHz default."+ },+ {+ "number": "8",+ "name": "PGOOD",+ "type": "tri_state",+ "description": "Open-drain power-good flag output; use 10kΩ to 100kΩ pullup resistor to logic rail no higher than 12V; provides 220µs deglitch delay."+ },+ {+ "number": "9",+ "name": "FB",+ "type": "input",+ "description": "Feedback sense input pin; connect to midpoint of feedback divider to set VOUT; reference voltage 1.011V typical; do not short this pin to ground during operation."+ },+ {+ "number": "10",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground pin serving as ground reference for internal references and logic; connect to system ground."+ },+ {+ "number": "11",+ "name": "SS/TRK",+ "type": "input",+ "description": "Soft-start control pin; leave floating for 4.1ms internal soft-start or connect capacitor to extend soft-start time; can connect external voltage ramp for output voltage tracking."+ },+ {+ "number": "12",+ "name": "EN",+ "type": "input",+ "description": "Enable input to internal LDO and regulator; high enables operation and low disables; connect to VIN, resistor divider, or external voltage/logic source; do not float; 2.1V typical enable threshold."+ },+ {+ "number": "13",+ "name": "VIN",+ "type": "power_in",+ "description": "Supply input pins to internal LDO and high-side power FET, 3.5V to 36V range; connect to power supply and bypass capacitors CIN; maintain short path to high-frequency bypass capacitor and PGND."+ },+ {+ "number": "14",+ "name": "VIN",+ "type": "power_in",+ "description": "Supply input pins to internal LDO and high-side power FET, 3.5V to 36V range; connect to power supply and bypass capacitors CIN; maintain short path to high-frequency bypass capacitor and PGND."+ },+ {+ "number": "15",+ "name": "PGND",+ "type": "power_in",+ "description": "Power ground pins connected internally to low-side power FET; connect to system ground, PAD, AGND, and ground pins of input/output capacitors; maintain short path to CIN."+ },+ {+ "number": "16",+ "name": "PGND",+ "type": "power_in",+ "description": "Power ground pins connected internally to low-side power FET; connect to system ground, PAD, AGND, and ground pins of input/output capacitors; maintain short path to CIN."+ },+ {+ "number": "17",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "exposed pad 17 added from the footprint",+ "dropped thermal pad ['EP'] absent from footprint"+ ],+ "pages_sent": 59,+ "cost_usd": 0.6177,+ "at": "2026-09-23T08:52:01"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/lm43603",+ "pages": 59,+ "sha256": "2642edca40e62388",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 17,+ "described": 17,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}