component
LM43603PWP
Public Made by Adomby adom
Texas Instruments DC-DC Converters, HTSSOP-16-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
← Commit history
README.mdadded+54@@ -0,0 +1,54 @@+# LM43603PWP++**Texas Instruments** · DC-DC Converters · HTSSOP-16-EP++LM43603PWP from Texas Instruments, in a HTSSOP-16-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | SW | output | Switching output internally connected to both power MOSFETs, swinging between 0 V and VIN, that connects to the power inductor. |+| 2 | SW | output | Switching output internally connected to both power MOSFETs, swinging between 0 V and VIN, that connects to the power inductor. |+| 3 | CBOOT | power_in | Bootstrap capacitor connection for high-side gate driver charged from SW with a maximum voltage rating of 5.5 V relative to SW. |+| 4 | VCC | power_out | Internal bias supply output rated to 3.6 V maximum that requires bypass capacitor to AGND and must never be shorted to ground during operation. |+| 5 | BIAS | power_in | Optional external LDO supply input accepting 3.3 V to 28 V (or external 3.3/5 V rail) with 1-10 µF bypass capacitor when used, or tie to ground when not used. |+| 6 | SYNC | input | Clock input to synchronize switching action to external clock (−0.3 V to 5.5 V) with proper high-speed termination required to prevent ringing. |+| 7 | RT | input | Frequency programming resistor connection to AGND that programs switching frequency from 200 kHz to 2.2 MHz (default 500 kHz when floating). |+| 8 | PGOOD | tri_state | Open-drain power-good flag output rated to 15 V maximum requiring 10 kΩ to 100 kΩ pullup resistor to logic rail ≤ 12 V. |+| 9 | FB | input | Feedback sense input pin (−0.3 V to 1.1 V) connected to resistor divider for output voltage setting that must not be shorted to ground. |+| 10 | AGND | power_in | Analog ground reference for internal references and logic that requires low-impedance connection to system ground and PAD. |+| 11 | SS/TRK | input | Soft-start control pin that can be left floating for 4.1 ms internal ramp, connected to capacitor to extend ramp, or driven by external voltage for tracking. |+| 12 | EN | input | Enable input (high = ON, low = OFF) for regulator and internal LDO that must connect to VIN, divider, or external logic source and never float. |+| 13 | VIN | power_in | Supply input to internal LDO and high-side power FET with operating range 3.5 V to 36 V (absolute maximum 42 V) requiring connection to power supply and bypass capacitors. |+| 14 | VIN | power_in | Supply input to internal LDO and high-side power FET with operating range 3.5 V to 36 V (absolute maximum 42 V) requiring connection to power supply and bypass capacitors. |+| 15 | PGND | power_in | Power ground connected internally to low-side power FET that establishes return path for power and requires connection to system ground, PAD, and ground of CIN/COUT. |+| 16 | PGND | power_in | Power ground connected internally to low-side power FET that establishes return path for power and requires connection to system ground, PAD, and ground of CIN/COUT. |+| 17 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | HTSSOP-16-EP |+| Category | Power Management (PMIC) |+| Pins | 17 |++## CAD (KiCad official)++- Symbol: `LM43603PWP`+- Footprint: `Package_SO:TSSOP-16-1EP_4.4x5mm_P0.65mm`+- 3D model: HTSSOP-16-EP (KiCad packages3D, STEP)+- 3D model files: `lm43603pwp-etched.step` / `lm43603pwp-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lm43603pwp.step` / `lm43603pwp.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/lm43603) (59 pp, sha256 `2642edca40e62388`, retrieved 2026-10-05, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/lm43603pwp-datasheet.pdf)
page.jsonadded+215@@ -0,0 +1,215 @@+{+ "slug": "lm43603pwp",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments DC-DC Converters, HTSSOP-16-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "lm43603pwp",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "lm43603pwp.kicad_sym",+ "lm43603pwp.kicad_mod",+ "lm43603pwp.glb",+ "lm43603pwp.step",+ "lm43603pwp.lbr",+ "docs/hero.png",+ "docs/lm43603pwp-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "lm43603pwp-hero.glb",+ "lm43603pwp-hero.overlay.json"+ ],+ "component": {+ "mpn": "LM43603PWP",+ "manufacturer": "Texas Instruments",+ "package": "HTSSOP-16-EP",+ "pin_count": 17,+ "category": "Power Management (PMIC)",+ "subcategory": "DC-DC Converters",+ "datasheet": "https://www.ti.com/cn/lit/gpn/lm43603",+ "parts": {+ "symbol": "lm43603pwp.kicad_sym",+ "footprint": "lm43603pwp.kicad_mod",+ "model_3d": "lm43603pwp-hero.glb",+ "model_3d_plain": "lm43603pwp.glb",+ "model_3d_step": "lm43603pwp-etched.step",+ "model_3d_step_plain": "lm43603pwp.step",+ "lbr": "lm43603pwp.lbr"+ },+ "distributor_links": {+ "lcsc": 2860202,+ "digikey": "296-44415-5-ND",+ "mouser": "595-LM43603PWP"+ },+ "distributor_check": {+ "checked_at": "2026-10-05T22:42:36Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-44415-5-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-LM43603PWP",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "SW",+ "type": "output",+ "description": "Switching output internally connected to both power MOSFETs, swinging between 0 V and VIN, that connects to the power inductor."+ },+ {+ "number": "2",+ "name": "SW",+ "type": "output",+ "description": "Switching output internally connected to both power MOSFETs, swinging between 0 V and VIN, that connects to the power inductor."+ },+ {+ "number": "3",+ "name": "CBOOT",+ "type": "power_in",+ "description": "Bootstrap capacitor connection for high-side gate driver charged from SW with a maximum voltage rating of 5.5 V relative to SW."+ },+ {+ "number": "4",+ "name": "VCC",+ "type": "power_out",+ "description": "Internal bias supply output rated to 3.6 V maximum that requires bypass capacitor to AGND and must never be shorted to ground during operation."+ },+ {+ "number": "5",+ "name": "BIAS",+ "type": "power_in",+ "description": "Optional external LDO supply input accepting 3.3 V to 28 V (or external 3.3/5 V rail) with 1-10 µF bypass capacitor when used, or tie to ground when not used."+ },+ {+ "number": "6",+ "name": "SYNC",+ "type": "input",+ "description": "Clock input to synchronize switching action to external clock (−0.3 V to 5.5 V) with proper high-speed termination required to prevent ringing."+ },+ {+ "number": "7",+ "name": "RT",+ "type": "input",+ "description": "Frequency programming resistor connection to AGND that programs switching frequency from 200 kHz to 2.2 MHz (default 500 kHz when floating)."+ },+ {+ "number": "8",+ "name": "PGOOD",+ "type": "tri_state",+ "description": "Open-drain power-good flag output rated to 15 V maximum requiring 10 kΩ to 100 kΩ pullup resistor to logic rail ≤ 12 V."+ },+ {+ "number": "9",+ "name": "FB",+ "type": "input",+ "description": "Feedback sense input pin (−0.3 V to 1.1 V) connected to resistor divider for output voltage setting that must not be shorted to ground."+ },+ {+ "number": "10",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground reference for internal references and logic that requires low-impedance connection to system ground and PAD."+ },+ {+ "number": "11",+ "name": "SS/TRK",+ "type": "input",+ "description": "Soft-start control pin that can be left floating for 4.1 ms internal ramp, connected to capacitor to extend ramp, or driven by external voltage for tracking."+ },+ {+ "number": "12",+ "name": "EN",+ "type": "input",+ "description": "Enable input (high = ON, low = OFF) for regulator and internal LDO that must connect to VIN, divider, or external logic source and never float."+ },+ {+ "number": "13",+ "name": "VIN",+ "type": "power_in",+ "description": "Supply input to internal LDO and high-side power FET with operating range 3.5 V to 36 V (absolute maximum 42 V) requiring connection to power supply and bypass capacitors."+ },+ {+ "number": "14",+ "name": "VIN",+ "type": "power_in",+ "description": "Supply input to internal LDO and high-side power FET with operating range 3.5 V to 36 V (absolute maximum 42 V) requiring connection to power supply and bypass capacitors."+ },+ {+ "number": "15",+ "name": "PGND",+ "type": "power_in",+ "description": "Power ground connected internally to low-side power FET that establishes return path for power and requires connection to system ground, PAD, and ground of CIN/COUT."+ },+ {+ "number": "16",+ "name": "PGND",+ "type": "power_in",+ "description": "Power ground connected internally to low-side power FET that establishes return path for power and requires connection to system ground, PAD, and ground of CIN/COUT."+ },+ {+ "number": "17",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "exposed pad 17 added from the footprint",+ "dropped thermal pad ['EP'] absent from footprint"+ ],+ "pages_sent": 9,+ "cost_usd": 0.149,+ "at": "2026-10-05T22:42:21"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/lm43603",+ "pages": 59,+ "sha256": "2642edca40e62388",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 17,+ "described": 17,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}