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Contents

README

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LM43603AQPWPTQ1

Texas Instruments · DC-DC Converters · HTSSOP-16-EP

LM43603AQPWPTQ1 from Texas Instruments, in a HTSSOP-16-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SW power_out Switching output of the regulator, internally connected to both power MOSFETs; connect to the power inductor.
2 SW power_out Switching output of the regulator, internally connected to both power MOSFETs; connect to the power inductor.
3 CBOOT passive Bootstrap capacitor connection for the high-side driver; connect a high-quality 470-nF capacitor from CBOOT to SW.
4 VCC power_out Internal bias supply output for bypassing to AGND; do not connect external loading to this pin and never short it to ground during operation.
5 BIAS power_in Optional internal LDO supply input, recommended tied to VOUT for 3.3 V ≤ VOUT ≤ 28 V; BIAS pin voltage should never exceed VIN, and the pin must be tied to ground when unused and not left floating.
6 SYNC input Clock input to synchronize switching action to an external clock; use proper high-speed termination, connect to ground if not used, and do not float.
7 RT passive Resistor connection from this pin to AGND programs the switching frequency; leave floating for the 500 kHz default.
8 PGOOD output Open-drain power-good flag output; use a 10-kΩ to 100-kΩ pullup to a logic rail or DC voltage no higher than 12 V.
9 FB input Feedback sense input connected to the midpoint of the feedback divider to set VOUT; do not short this pin to ground during operation.
10 AGND power_in Analog ground pin serving as the ground reference for internal references and logic; connect to system ground.
11 SS/TRK passive Soft-start control pin: leave floating for internal soft-start slew rate, connect a capacitor to extend soft-start time, or connect an external voltage ramp for tracking.
12 EN input Enable input to the internal LDO and regulator, high = ON and low = OFF; connect to VIN, a resistor divider, or an external voltage or logic source and do not float.
13 VIN power_in Supply input to the internal LDO and high-side power FET; bypass with CIN and keep the path from VIN to CIN and PGND as short as possible.
14 VIN power_in Supply input to the internal LDO and high-side power FET; bypass with CIN and keep the path from VIN to CIN and PGND as short as possible.
15 PGND power_in Power ground pin connected internally to the low-side power FET; connect to system ground, PAD, AGND and the CIN and COUT grounds.
16 PGND power_in Power ground pin connected internally to the low-side power FET; connect to system ground, PAD, AGND and the CIN and COUT grounds.
17 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package HTSSOP-16-EP
Category Power Supply Chip
Pins 17

CAD (KiCad official)

  • Symbol: LM43603AQPWPTQ1
  • Footprint: Package_SO:TSSOP-16-1EP_4.4x5mm_P0.65mm
  • 3D model: HTSSOP-16-EP (KiCad packages3D, STEP)
  • 3D model files: lm43603aqpwptq1-etched.step / lm43603aqpwptq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lm43603aqpwptq1.step / lm43603aqpwptq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (50 pp, sha256 a594b61b24d8e622, retrieved 2026-10-08, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF