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LM43603AQPWPRQ1

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Texas Instruments DC-DC Converters, HTSSOP-16-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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LM43603AQPWPRQ1

Texas Instruments · DC-DC Converters · HTSSOP-16-EP

LM43603AQPWPRQ1 from Texas Instruments, in a HTSSOP-16-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SW output Switching output of regulator internally connected to both power MOSFETs; connect to power inductor.
2 SW output Switching output of regulator internally connected to both power MOSFETs; connect to power inductor.
3 CBOOT passive Bootstrap capacitor connection for high-side driver; connect 470-nF capacitor from CBOOT to SW.
4 VCC power_out Internal bias supply output for bypassing; connect bypass capacitor to AGND, do not connect external loading, never short to ground during operation.
5 BIAS power_in Optional internal LDO supply input with voltage range 3.3V to 28V or VIN; place bypass capacitor 1-10µF to ground when used, tie to ground when not in use, voltage must not exceed VIN.
6 SYNC input Clock input to synchronize switching action to external clock; use high-speed termination to prevent ringing, connect to ground if not used, do not float.
7 RT input Connect resistor from this pin to AGND to program switching frequency; leave floating for 500 kHz default switching frequency.
8 PGOOD output Open drain output for power-good flag; use 10-kΩ to 100-kΩ pullup resistor to logic rail or DC voltage no higher than 12V.
9 FB input Feedback sense input pin connected to midpoint of feedback divider to set VOUT; do not short to ground during operation.
10 AGND power_in Analog ground pin providing ground reference for internal references and logic; connect to system ground.
11 SS/TRK input Soft-start control pin; leave floating for internal soft-start slew rate, connect to capacitor to extend soft start time, or connect external voltage ramp for tracking.
12 EN input Enable input to internal LDO and regulator with high = ON and low = OFF; connect to VIN, resistor divider, or external voltage source, do not float.
13 VIN power_in Supply input pin to internal LDO and high side power FET with voltage range 3.5V to 36V (absolute maximum 42V); connect to power supply and bypass capacitors CIN with path as short as possible.
14 VIN power_in Supply input pin to internal LDO and high side power FET with voltage range 3.5V to 36V (absolute maximum 42V); connect to power supply and bypass capacitors CIN with path as short as possible.
15 PGND power_in Power ground pin connected internally to low side power FET; connect to system ground, PAD, AGND, and ground pins of CIN and COUT with path as short as possible.
16 PGND power_in Power ground pin connected internally to low side power FET; connect to system ground, PAD, AGND, and ground pins of CIN and COUT with path as short as possible.
17 PAD passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package HTSSOP-16-EP
Category Power Supply Chip
Pins 17

CAD (KiCad official)

  • Symbol: LM43603AQPWPRQ1
  • Footprint: Package_SO:TSSOP-16-1EP_4.4x5mm_P0.65mm
  • 3D model: HTSSOP-16-EP (KiCad packages3D, STEP)
  • 3D model files: lm43603aqpwprq1-etched.step / lm43603aqpwprq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lm43603aqpwprq1.step / lm43603aqpwprq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (50 pp, sha256 a594b61b24d8e622, retrieved 2026-10-05, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF