component
LM4132DQ1MFT3.0
Public Made by Adomby adom
Texas Instruments Voltage Reference, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownLM4132DQ1MFT3.0
Texas Instruments · Voltage Reference · SOT-23-5
LM4132DQ1MFT3.0 from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | N/C | unconnected | No connect pin; leave floating. |
| 2 | GND | power_in | Ground pin for the device. |
| 3 | EN | input | Enable pin: drive it between 65% of VIN and VIN to enable, or between 0 V and 35% of VIN to disable, and never let it exceed VIN because the device does not operate correctly for VEN > VIN; it can be left floating (internal pull-up of about 2 µA) or tied to VIN. |
| 4 | VIN | power_in | Input supply, which must be above VREF + 400 mV (at ILOAD ≤ 10 mA) and no higher than the 5.5 V maximum input supply voltage, with a -0.3 V to 6 V absolute maximum on any input. |
| 5 | VREF | power_out | Reference voltage output, which for this 3.0 V variant sources up to 20 mA and needs no output capacitor, though it is stable with low-ESR ceramic capacitors. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage initial accuracy (LM4132D-3.0, D grade) | VREF | -0.4 | 0.4 | % | LM4132D-3.0 (D Grade - 0.4%) | 8 | |
| Temperature coefficient (LM4132D-3.0) | TCVREF/°C | 20 | ppm/°C | 8 | |||
| Supply current | IQ | 100 | µA | –40°C ≤ TJ ≤ 125°C | 8 | ||
| Supply current in shutdown | IQ_SD | 7 | µA | –40°C ≤ TJ ≤ 125°C | 8 | ||
| Load regulation | ΔVREF/ΔILOAD | 120 | ppm/mA | –40°C ≤ TJ ≤ 125°C | 8 | ||
| Dropout voltage | VIN – VREF | 400 | mV | –40°C ≤ TJ ≤ 125°C | 8 | ||
| Enable pin maximum low input level | VIL | 35 | % (VIN) | –40°C ≤ TJ ≤ 125°C | 8 | ||
| Enable pin minimum high input level | VIH | 65 | % (VIN) | –40°C ≤ TJ ≤ 125°C | 8 | ||
| Maximum voltage on any input | -0.3 | 6 | V | 3 | |||
| Power dissipation | 350 | mW | TA = 25°C | 3 | |||
| Lead temperature (soldering, 10 sec) | 260 | °C | 3 | ||||
| Vapor phase (60 sec) | 215 | °C | 3 | ||||
| Infrared (15 sec) | 220 | °C | 3 | ||||
| Storage temperature | Tstg | -65 | 150 | °C | 3 | ||
| Maximum input supply voltage | 5.5 | V | 4 | ||||
| Maximum load current (LM4132 row) | 20 | mA | LM4132 | 4 | |||
| Junction temperature | TJ | -40 | 125 | °C | 4 | ||
| Junction-to-ambient thermal resistance | RθJA | 164.1 | °C/W | 4 | |||
| Junction-to-case (top) thermal resistance | RθJC(top) | 115.3 | °C/W | 4 | |||
| Junction-to-board thermal resistance | RθJB | 27.1 | °C/W | 4 |
CAD (KiCad official)
- Symbol:
LM4132DQ1MFT3.0 - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
lm4132dq1mft3-0-etched.step/lm4132dq1mft3-0-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lm4132dq1mft3-0.step/lm4132dq1mft3-0.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (44 pp, sha256
4bd8402ff026fdf1, retrieved 2026-10-12, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).