component
LM4040DIM3-2.5+T
Public Made by Adomby adom
Analog Devices Inc Maxim Integrated Voltage Reference, SOT-23. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Contents
README
markdownLM4040DIM3-2.5+T
Analog Devices Inc Maxim Integrated · Voltage Reference · SOT-23
LM4040DIM3-2.5+T from Analog Devices Inc Maxim Integrated, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | + | passive | Positive (cathode) terminal of the shunt reference. Connect through a source resistor RS to the supply; the device regulates VR = 2.500V across pins 1 (+) and 2 (-). Reverse current must be kept between IRMIN (~65µA typ, 70µA max for D-grade) and 15mA for regulation, and must never exceed 20mA absolute maximum. |
| 2 | - | passive | Negative (anode) terminal of the shunt reference. Typically tied to circuit ground; forward current from anode to cathode must not exceed 10mA absolute maximum. |
| 3 | N.C. | unconnected | No internal connection. Must be left unconnected or tied to pin 2 (negative terminal); do not connect to any other node. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices Inc Maxim Integrated |
| Package | SOT-23 |
| Category | Power Management (PMIC) |
| Pins | 3 |
Ordering variants
Same part, different packaging or reel option.
LM4040DIM3-2.5+TLM4040DIM3-2.5+TDEM3-2.5+TLM4040DIM3-2.5+TAIM3-2.5+TLM4040DIM3-2.5+TBIM3-2.5+TLM4040DIM3-2.5+TCIM3-2.5+TLM4040DIM3-2.5+TAEM3-2.5+TLM4040DIM3-2.5+TBEM3-2.5+TLM4040DIM3-2.5+TCEM3-2.5+TLM4040DIM3-2.5+TBIM3-2.5/V+TLM4040DIM3-2.5+TCEM3-2.5/V+TLM4040DIM3-2.5+TDIX3-2.5+TLM4040DIM3-2.5+TAIX3-2.5+TLM4040DIM3-2.5+TBIX3-2.5+TLM4040DIM3-2.5+TCIX3-2.5+TLM4040DIM3-2.5+TAEX3-2.5+TLM4040DIM3-2.5+TBEX3-2.5+TLM4040DIM3-2.5+TCEX3-2.5+TLM4040DIM3-2.5+TDEX3-2.5+T
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Reverse Breakdown Voltage (LM4040D, 1.0%, 2.500V) | VR | 2.475 | 2.5 | 2.525 | V | IR = 100µA, TA = +25°C | 4 |
| Reverse Breakdown Voltage Tolerance (overtemperature, LM4040D) | VR | -49 | 20 | 49 | mV | LM4040D, Note 2 | 4 |
| Minimum Operating Current (LM4040D) | IRMIN | 45 | 70 | µA | LM4040D | 4 | |
| Average Reverse Voltage Temperature Coefficient (LM4040D) | ∆VR/∆T | -20 | 20 | ppm/°C | IR = 10mA | 4 | |
| Average Reverse Voltage Temperature Coefficient (LM4040D) | ∆VR/∆T | -150 | 15 | 150 | ppm/°C | IR = 1mA | 4 |
| Average Reverse Voltage Temperature Coefficient (LM4040D) | ∆VR/∆T | -15 | 15 | ppm/°C | IR = 100µA | 4 | |
| Reverse Breakdown Voltage Change with Operating Current Change (LM4040D) | 0.4 | 1.2 | mV | IRMIN ≤ IR ≤ 1mA | 4 | ||
| Reverse Breakdown Voltage Change with Operating Current Change (LM4040D) | 2.5 | 10 | mV | 1mA ≤ IR ≤ 15mA | 4 | ||
| Reverse Dynamic Impedance (LM4040D) | ZR | 0.3 | 1.1 | Ω | IR = 1mA, f = 120Hz, IAC = 0.1IR | 4 | |
| Reverse Current (cathode to anode) | 20 | mA | 2 | ||||
| Forward Current (anode to cathode) | 10 | mA | 2 | ||||
| Operating Temperature Range (LM4040_I_ _ _) | TA | -40 | 85 | °C | I-grade (LM4040DIM3) | 2 | |
| Storage Temperature Range | TSTG | -65 | 150 | °C | 2 | ||
| Junction Temperature | TJ | 150 | °C | 2 | |||
| Lead Temperature (soldering) | 300 | °C | soldering, 10s | 2 | |||
| Soldering Temperature (reflow) | 260 | °C | reflow | 2 | |||
| Thermal Resistance Junction to Ambient (SOT23, four-layer board) | θJA | 336 | °C/W | Four-layer board, JESD51-7 | 2 | ||
| Thermal Resistance Junction to Case (SOT23, four-layer board) | θJC | 110.1 | °C/W | Four-layer board, JESD51-7 | 2 |
CAD (KiCad official)
- Symbol:
LM4040DIM3-2.5+T - Footprint:
Package_TO_SOT_SMD:SOT-23 - 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files:
lm4040dim3-2-5-t-etched.step/lm4040dim3-2-5-t-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lm4040dim3-2-5-t.step/lm4040dim3-2-5-t.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices Inc Maxim Integrated datasheet (None pp, sha256
cb26444d98d751a0, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).