# LM3421Q1MHX

**Texas Instruments** · LED Drivers · HTSSOP-16-EP

LM3421Q1MHX from Texas Instruments, in a HTSSOP-16-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Input voltage with a 4.5 V to 75 V range; bypass with a 100-nF capacitor to AGND as close to the device as possible. |
| 2 | EN | input | Enable pin; connect to AGND for zero current shutdown or apply more than 2.4 V to enable the device. |
| 3 | COMP | input | Compensation pin; connect a capacitor to AGND to set the compensation. |
| 4 | CSH | input | Current sense high; connect a resistor to AGND to set the signal current. |
| 5 | RCT | input | Resistor capacitor timing; the external RC network sets the predictive off-time and thus the switching frequency. |
| 6 | AGND | power_in | Analog ground; connect to PGND through the DAP copper pad to provide ground return for CSH, COMP, RCT, and TIMR. |
| 7 | OVP | input | Overvoltage protection; connect to a resistor divider from VO to program output overvoltage lockout with a 1.24 V turnoff threshold. |
| 8 | nDIM | input | Dimming input and undervoltage protection; turnon threshold is 1.24 V with turnoff hysteresis provided by a 23-µA current source. |
| 9 | DDRV | output | Dim gate drive output; connect to the gate of the dimming MOSFET. |
| 10 | PGND | power_in | Power ground; connect to AGND through the DAP copper pad to provide ground return for GATE and DDRV. |
| 11 | GATE | output | Main gate drive output; connect to the gate of the main switching MOSFET. |
| 12 | VCC | power_out | Internal regulator output; bypass with a 2.2-µF to 3.3-µF ceramic capacitor to PGND. |
| 13 | IS | input | Main switch current sense; connect to the drain of the main N-channel MOSFET for RDS-ON sensing or to a sense resistor in its source. |
| 14 | RPD | input | Resistor pulldown; connect the low side of all external resistor dividers (VIN UVLO, OVP) to implement zero-current shutdown. |
| 15 | HSP | input | LED current sense positive; connect through a series resistor to the positive side of the LED current sense resistor. |
| 16 | HSN | input | LED current sense negative; connect through a series resistor to the negative side of the LED current sense resistor. |
| 17 | DAP | power_in | Thermal pad on the bottom of the IC acting as a star ground that connects AGND and PGND. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HTSSOP-16-EP |
| Category | Nixie Tube Driver/LED Driver |
| Pins | 17 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage | VIN | 4.5 |  | 75 | V |  | 6 |
| Operating junction temperature (LM3421-Q1) | TJ | -40 |  | 125 | °C | LM3421-Q1 | 6 |
| VCC regulation | VCCREG | 6.3 |  | 7.35 | V | ICC = 0 mA | 7 |
| VCC current limit | ICCLIM | 20 |  |  | mA | VCC = 0 V | 7 |
| Quiescent current (LM3421-Q1) | IQ |  |  | 3 | mA | VEN = 3 V, Static | 7 |
| Shutdown current | ISD |  |  | 1 | µA | VEN = 0 V | 7 |
| VCC UVLO threshold (increasing) | VCCUV | 4.5 |  |  | V | VCC Increasing | 7 |
| VCC UVLO hysteresis | VCCHYS |  | 0.1 |  | V | TA = 25°C | 7 |
| EN start-up threshold (increasing, LM3421-Q1) | ENST | 2.4 |  |  | V | VEN Increasing | 7 |
| EN start-up hysteresis | ENSTHYS |  | 0.1 |  | V | TA = 25°C | 7 |
| EN pulldown resistance | REN | 0.245 |  | 2.85 | MΩ | VEN = 1 V | 7 |
| OVP OVLO threshold | OVPCB | 1.185 |  | 1.285 | V | OVP Increasing | 7 |
| OVP hysteresis source current (LM3421-Q1) | OVPHYS | 20 |  | 25 | µA | OVP Active (high) | 7 |
| DPOL logic threshold | DPOLTHRSH | 2 |  | 2.6 | V | DPOL Increasing | 8 |
| FAULT threshold (LM3421-Q1) | VFLTTH | 1.185 |  | 1.285 | V |  | 8 |
| FAULT pin source current (LM3421-Q1) | IFLT | 10 |  | 13 | µA |  | 8 |
| CSH reference voltage | VREF | 1.21 |  | 1.26 | V | w/r/t to AGND | 8 |
| Error amplifier input bias current |  | -0.6 | 0 | 0.6 | µA | TJ = 25°C | 8 |
| COMP sink or source current (LM3421-Q1) |  | 22 |  | 35 | µA |  | 8 |
| Linear input range |  | -125 |  | 125 | mV | TJ = 25°C; specified by design | 8 |
| VRCT VIN/25 reference voltage (LM3421-Q1) | VRCT | 540 |  | 585 | mV | VIN = 14 V | 8 |
| COMP-to-PWM offset voltage |  | 700 |  | 900 | mV |  | 9 |
| Current limit threshold | ILIM | 215 |  | 275 | mV |  | 9 |
| Leading edge blanking time | tLEB | 115 |  | 325 | ns |  | 9 |
| Input offset current |  | -1.5 |  | 1.5 | µA |  | 9 |
| Input offset voltage |  | -7 |  | 7 | mV |  | 9 |
| nDIM / UVLO threshold | nDIMVTH | 1.185 |  | 1.285 | V |  | 9 |
| nDIM hysteresis current (LM3421-Q1) | nDIMHYS | 20 |  | 25 | µA |  | 9 |
| GATE sourcing resistance | RSRC(GATE) |  |  | 6 | Ω | GATE = High | 9 |
| GATE sinking resistance | RSNK(GATE) |  |  | 4.5 | Ω | GATE = Low | 9 |
| DDRV sourcing resistance | RSRC(DDRV) |  |  | 30 | Ω | DDRV = High | 9 |
| DDRV sinking resistance | RSNK(DDRV) |  |  | 10 | Ω | DDRV = Low | 9 |
| RPD pulldown resistance (LM3421-Q1) | RRPD |  |  | 300 | Ω |  | 10 |
| FLT pulldown resistance (LM3421-Q1) | RFLT |  |  | 300 | Ω |  | 10 |
| LRDY pulldown resistance (LM3421-Q1) | RLRDY |  |  | 300 | Ω |  | 10 |
| Thermal shutdown threshold (LM3421-Q1) | TSD |  | 165 |  | °C | TJ = 25°C | 10 |
| Thermal shutdown hysteresis | THYS |  | 25 |  | °C | TJ = 25°C | 10 |
| Junction-to-ambient thermal resistance (PWP HTSSOP 16 pins) | RθJA |  | 38.9 |  | °C/W | PWP (HTSSOP), 16 pins | 6 |
| Junction-to-case (top) thermal resistance (PWP HTSSOP 16 pins) | RθJC(top) |  | 23.1 |  | °C/W | PWP (HTSSOP), 16 pins | 6 |
| Junction-to-board thermal resistance (PWP HTSSOP 16 pins) | RθJB |  | 16.8 |  | °C/W | PWP (HTSSOP), 16 pins | 6 |
| Junction-to-top characterization parameter (PWP HTSSOP 16 pins) | ψJT |  | 0.6 |  | °C/W | PWP (HTSSOP), 16 pins | 6 |
| Junction-to-board characterization parameter (PWP HTSSOP 16 pins) | ψJB |  | 16.6 |  | °C/W | PWP (HTSSOP), 16 pins | 6 |
| Junction-to-case (bottom) thermal resistance (PWP HTSSOP 16 pins) | RθJC(bot) |  | 1.7 |  | °C/W | PWP (HTSSOP), 16 pins | 6 |
| Absolute maximum voltage: VIN, EN, RPD, nDIM |  | -0.3 |  | 76 | V |  | 5 |
| Absolute maximum voltage: OVP, HSP, HSN, LRDY, FLT, DPOL |  | -0.3 |  | 76 | V |  | 5 |
| Absolute maximum voltage: IS |  | -0.3 |  | 76 | V |  | 5 |
| Absolute maximum voltage: VCC |  | -0.3 |  | 8 | V |  | 5 |
| Absolute maximum voltage: TIMR |  | -0.3 |  | 7 | V |  | 5 |
| Absolute maximum voltage: COMP, CSH |  | -0.3 |  | 6 | V |  | 5 |
| Absolute maximum voltage: GATE, DDRV |  | -0.3 |  |  | V | Maximum printed as VCC | 5 |
| Absolute maximum voltage: PGND |  | -0.3 |  | 0.3 | V |  | 5 |
| Storage temperature |  | -65 |  | 150 | °C |  | 5 |
| Maximum lead temperature (solder and reflow) |  |  |  | 260 | °C |  | 5 |

## CAD (KiCad official)

- Symbol: `LM3421Q1MHX`
- Footprint: `Package_SO:TSSOP-16-1EP_4.4x5mm_P0.65mm`
- 3D model: HTSSOP-16-EP (KiCad packages3D, STEP)
- 3D model files: `lm3421q1mhx-etched.step` / `lm3421q1mhx-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lm3421q1mhx.step` / `lm3421q1mhx.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/lm3421-q1) (80 pp, sha256 `e82ddb4d986b65c0`, retrieved 2026-11-05, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/lm3421q1mhx-datasheet.pdf)