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Ray Publish 0.1.0 ae4e319 14d ago

LM3407A

Leiditech · MOSFETs · SOT-23

LM3407A from Leiditech, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; gate-source voltage is limited to ±20 V max, with gate threshold VGS(th) of -1 V to -2 V at ID = -250 µA.
2 S passive Source of the P-channel MOSFET; the body diode forward drop VSD is at most -1 V at IS = -1 A.
3 D passive Drain; drain-source voltage is rated -30 V max, with continuous drain current of -4.1 A and pulsed drain current of -16 A.

Key specifications

Parameter Value
Manufacturer Leiditech
Package SOT-23
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: LM3407A
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: lm3407a-etched.step / lm3407a-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lm3407a.step / lm3407a.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Leiditech datasheet (3 pp, sha256 1e0ab639f627a9c2, retrieved 2026-10-20, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF