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LM324BIDR

Public Made by Adom

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Texas Instruments , SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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LM324BIDR

Texas Instruments · IC · SOIC-14

LM324BIDR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OUT output Output of amplifier 1.
2 1IN- input Negative (inverting) input of amplifier 1.
3 1IN+ input Positive (non-inverting) input of amplifier 1.
4 VCC+ power_in Positive (highest) supply; B versions operate from 3V to 36V.
5 2IN+ input Positive (non-inverting) input of amplifier 2.
6 2IN- input Negative (inverting) input of amplifier 2.
7 2OUT output Output of amplifier 2.
8 3OUT output Output of amplifier 3.
9 3IN- input Negative (inverting) input of amplifier 3.
10 3IN+ input Positive (non-inverting) input of amplifier 3.
11 VCC- power_in Negative (lowest) supply or ground for single-supply operation.
12 4IN+ input Positive (non-inverting) input of amplifier 4.
13 4IN- input Negative (inverting) input of amplifier 4.
14 4OUT output Output of amplifier 4.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-14
Category
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input offset voltage VOS 0.6 3 mV LM324B, TA = 25°C 7
Input offset voltage over temperature VOS 4 mV LM324B, TA = -40°C to +85°C 7
Input offset voltage drift dVOS/dT 7 μV/°C RS = 0Ω, TA = -40°C to +85°C 7
Power supply rejection ratio PSRR 65 100 dB Input offset voltage versus power supply 7
Common-mode voltage range, VS = 3V to 36V VCM 0 V VS = 3V to 36V; min printed as V-, max as (V+), 1.5 7
Common-mode voltage range over temperature VCM 0 V VS = 5V to 36V, TA = -40°C to +85°C; min printed as V-, max as (V+), 2 7
Common-mode rejection ratio CMRR 70 80 dB VS = 3V to 36V, (V-) ≤ VCM ≤ (V+), 1.5V 7
Common-mode rejection ratio over temperature CMRR 65 80 dB VS = 5V to 36V, (V-) ≤ VCM ≤ (V+), 2V, TA = -40°C to +85°C 7
Input bias current IB -10 -35 nA TA = 25°C 7
Input bias current over temperature IB -60 nA TA = -40°C to +85°C 7
Input offset current IOS 0.5 4 nA TA = 25°C; printed ± 7
Input offset current over temperature IOS 5 nA TA = -40°C to +85°C; printed ± 7
Open-loop voltage gain AOL 50 100 V/mV VS = 15V, VO = 1V to 11V, RL ≥ 10kΩ connected to (V-) 7
Open-loop voltage gain over temperature AOL 25 V/mV TA = -40°C to +85°C 7
Positive rail output swing, IOUT = -50µA VO 1.35 1.5 V Voltage output swing from rail (V+), IOUT = -50µA 8
Positive rail output swing, IOUT = -1mA VO 1.4 1.6 V Voltage output swing from rail (V+), IOUT = -1mA 8
Positive rail output swing, IOUT = -5mA VO 1.5 1.75 V Voltage output swing from rail (V+), IOUT = -5mA 8
Negative rail output swing, IOUT = 50µA VO 100 150 mV Voltage output swing from rail (V-), IOUT = 50µA 8
Negative rail output swing, IOUT = 1mA VO 0.75 1 V Voltage output swing from rail (V-), IOUT = 1mA 8
Negative rail output swing, RL to V- VO 5 20 mV VS = 5V, RL ≤ 10kΩ connected to (V-), TA = -40°C to +85°C 8
Output source current IO -20 -30 mA Source, VS = 15V, VO = V-, VID = 1V 8
Output source current over temperature IO -10 mA Source, VS = 15V, VO = V-, VID = 1V, TA = -40°C to +85°C 8
Output sink current IO 10 20 mA Sink, VS = 15V, VO = V+, VID = -1V 8
Output sink current over temperature IO 5 mA Sink, VS = 15V, VO = V+, VID = -1V, TA = -40°C to +85°C 8
Output sink current, low VO IO 50 85 μA VID = -1V, VO = (V-) + 200mV 8
Short-circuit current ISC 40 60 mA VS = 20V, (V+) = 10V, (V-) = -10V, VO = 0V; printed ± 8
Quiescent current per amplifier, VS = 5V IQ 240 300 μA VS = 5V, IO = 0A, TA = -40°C to +85°C 8
Quiescent current per amplifier, VS = 36V IQ 350 750 μA VS = 36V, IO = 0A, TA = -40°C to +85°C 8
Supply voltage VCC 3 36 V 6
Common-mode voltage VCM 0 V max printed as VCC, 2 6
Operating free-air temperature TA -40 85 °C LM324Bx 6
Supply voltage (abs max) VCC 40 V LM324B, LM324BA, LM2902B, LM2902BA column 5
Differential input voltage (abs max) VID -40 40 V printed ±40 5
Input voltage, either input (abs max) VI -0.3 40 V 5
Operating virtual junction temperature TJ 150 °C 5
Storage temperature Tstg -65 150 °C 5
ESD human-body model V(ESD) -1000 1000 V HBM per ANSI/ESDA/JEDEC JS-001; printed ±1000 5
ESD charged-device model V(ESD) -1000 1000 V CDM per JESD22-C101; printed ±1000 5
Junction-to-ambient thermal resistance RθJA 99.3 °C/W D (SOIC) 14 pins 6
Junction-to-case (top) thermal resistance RθJC(top) 60.4 °C/W D (SOIC) 14 pins 6
Junction-to-board thermal resistance RθJB 57.5 °C/W D (SOIC) 14 pins 6
Junction-to-top characterization parameter ψJT 19.8 °C/W D (SOIC) 14 pins 6
Junction-to-board characterization parameter ψJB 57 °C/W D (SOIC) 14 pins 6
Channel separation 120 dB f = 1kHz to 20kHz 7
Input offset current drift dIOS/dT 10 pA/°C TA = -40°C to +85°C 7
Input voltage noise EN 3 μVPP f = 0.1Hz to 10Hz 7
Input voltage noise density eN 35 nV/√Hz RS = 100Ω, VI = 0V, f = 1kHz 7
Gain-bandwidth product GBW 1.2 MHz RL = 1MΩ, CL = 20pF 7
Slew rate SR 0.5 V/μs RL = 1MΩ, CL = 30pF, VI = ±10V 7
Phase margin Θm 56 ° G = +1, RL = 10kΩ, CL = 20pF 7
Settling time tS 4 μs To 0.1%, VS = 5V, 2V step, G = +1, CL = 100pF 7
Overload recovery time 10 μs VIN × gain > VS 7
Open-loop output impedance RO 300 Ω f = 1MHz, IO = 0A 8

CAD (KiCad official)

  • Symbol: LM324BIDR
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: lm324bidr-etched.step / lm324bidr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lm324bidr.step / lm324bidr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (65 pp, sha256 c2e59bbc9546c539, retrieved 2026-10-22, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF