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LM317SST

Public Made by Adom

by adom

PJSEMI Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-223. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)lm317sstfactory-2.0.0extractor-text
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Datasheet

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Contents

README

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LM317SST

PJSEMI · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-223

LM317SST from PJSEMI, in a SOT-223. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 FB passive Output feedback (adjust) pin: the device holds a nominal 1.25 V reference between VOUT and FB, and the adjustment current IAdj is designed to stay below 100 µA.
2 VOUT power_out Regulated output, adjustable from 1.2 V to 37 V with output current up to 1 A.
3 VIN power_in Power input; the input-output voltage differential must be between 3 V and 37 V, with an absolute maximum differential of 40 V.

Key specifications

Parameter Value
Manufacturer PJSEMI
Package SOT-223
Category Power Management (PMIC)
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Line Regulation ∆VLINE 0.01 0.04 %/V VI-VO =3V~40V 6
Load Regulation (VO ≤ 5V) ∆VLOAD 5 25 mV VO ≤ 5V, IO=10mA~1000mA 6
Load Regulation (VO ≥ 5V) ∆VLOAD 0.1 0.5 % VO VO ≥ 5V, IO=10mA~1000mA 6
Adjustment Pin Current Iadj 100 μA 6
Adjustment Pin Current Change ΔIadj 0.2 5 μA VI-VO =2.5V40V, IO=10mA1000mA 6
Reference Voltage Vref 1.2 1.3 V VI-VO =3V40V, IO=10mA1000mA 6
Reference Line Regulation ∆VLINE 0.02 0.07 %V VI-VO =3V~40V 6
Reference Load Regulation (VO ≤ 5V) ∆VLOAD 20 70 mV VO ≤ 5V, IO=10mA~1000mA 6
Reference Load Regulation (VO ≥ 5V) ∆VLOAD 0.3 1.5 % VO VO ≥ 5V, IO=10mA~1000mA 6
Minimum Load Current to Maintain Regulation IO_min 10 mA VI-VO=40V 6
Maximum Load Current to Maintain Regulation IO_max 1 A VI-VO ≤ 15V, PD<20W 6
Maximum Load Current to Maintain Regulation IO_max 0.1 0.3 A VI-VO=40V, PD<20W 6
Ripple Rejection Ratio (Cadj=10μF) RR 66 80 dB TA=25°C, f=120Hz, Cadj=10μF 6
Input-Output Voltage Differential 3 37 V 5
Output Current 1 A 5
Operating Ambient Temperature 0 125 °C 5
Input-Output Voltage Differential 40 V 5
Power Dissipation (SOT-223) 0.6 W Ratings at 25℃ ambient temperature 5
Junction Temperature 150 °C 5
Storage Temperature Range -40 150 °C 5
Thermal Resistance, Junction-to-Ambient (SOT-223) 165 °C/W Junction-to-Ambient 5

CAD (KiCad official)

  • Symbol: LM317SST
  • Footprint: Package_TO_SOT_SMD:SOT-223-3_TabPin2
  • 3D model: SOT-223 (KiCad packages3D, STEP)
  • 3D model files: lm317sst-etched.step / lm317sst-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lm317sst.step / lm317sst.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: PJSEMI datasheet (13 pp, sha256 652e28f242ffa0cb, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF